DSPIC33FJ128GP804T-I/PT Microchip Technology, DSPIC33FJ128GP804T-I/PT Datasheet - Page 241
![16-bit DSC, 128KB Flash,CAN,DMA,40 MIPS,nanoWatt 44 TQFP 10x10x1mm T/R](/photos/6/82/68251/c04-076_pt_sml.jpg)
DSPIC33FJ128GP804T-I/PT
Manufacturer Part Number
DSPIC33FJ128GP804T-I/PT
Description
16-bit DSC, 128KB Flash,CAN,DMA,40 MIPS,nanoWatt 44 TQFP 10x10x1mm T/R
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Specifications of DSPIC33FJ128GP804T-I/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b, D/A 6x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC33FJ128GP804T-I/PTTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ128GP804T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 241 of 412
- Download datasheet (6Mb)
REGISTER 19-24: CiRXOVF1: ECAN™ RECEIVE BUFFER OVERFLOW REGISTER 1
REGISTER 19-25: CiRXOVF2: ECAN™ RECEIVE BUFFER OVERFLOW REGISTER 2
© 2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
RXOVF15
RXOVF31
RXOVF23
RXOVF7
R/C-0
R/C-0
R/C-0
R/C-0
RXOVF<15:0>: Receive Buffer n Overflow bits
1 = Module attempted to write to a full buffer (set by module)
0 = No overflow condition
RXOVF<31:16>: Receive Buffer n Overflow bits
1 = Module attempted to write to a full buffer (set by module)
0 = No overflow condition
RXOVF14
RXOVF30
RXOVF22
RXOVF6
R/C-0
R/C-0
R/C-0
R/C-0
C = Writable bit, but only ‘0’ can be written to clear the bit
W = Writable bit
‘1’ = Bit is set
C = Writable bit, but only ‘0’ can be written to clear the bit
W = Writable bit
‘1’ = Bit is set
RXOVF13
RXOVF29
RXOVF21
RXOVF5
R/C-0
R/C-0
R/C-0
R/C-0
RXOVF12
RXOVF28
RXOVF20
RXOVF4
R/C-0
R/C-0
R/C-0
R/C-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
RXOVF27
RXOVF19
RXOVF11
RXOVF3
R/C-0
R/C-0
R/C-0
R/C-0
RXOVF10
RXOVF26
RXOVF18
RXOVF2
R/C-0
R/C-0
R/C-0
R/C-0
x = Bit is unknown
x = Bit is unknown
RXOVF25
RXOVF17
RXOVF9
RXOVF1
R/C-0
R/C-0
R/C-0
R/C-0
DS70292E-page 241
RXOVF24
RXOVF16
RXOVF8
RXOVF0
R/C-0
R/C-0
R/C-0
R/C-0
bit 8
bit 0
bit 8
bit 0
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