DSPIC33FJ128MC706T-I/PT Microchip Technology, DSPIC33FJ128MC706T-I/PT Datasheet - Page 304

• Manufacturer Part Number: DSPIC33FJ128MC706T-I/PT
• Description: IC,DSP,16-BIT,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC706T-I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

dsPIC33FJXXXMCX06/X08/X10
TABLE 26-36: I2Cx BUS DATA TIMING REQUIREMENTS (MASTER MODE)
DS70287C-page 302
AC CHARACTERISTICS
IM10
IM11
IM20
IM21
IM25
IM26
IM30
IM31
IM33
IM34
IM40
IM45
IM50
Note 1:
Param
No.
2:
T
T
T
T
T
T
T
T
T
T
T
T
C
Symbol
SU
SU
SU
AA
R
LO
HI
F
HD
HD
HD
BF
B
BRG is the value of the I
(I
Maximum pin capacitance = 10 pF for all I2Cx pins (for 1 MHz mode only).
:
:
SCL
2
:
SCL
:
:
:
:
:
:
SCL
:
:
:
C™)” (DS70195) in the “dsPIC33F Family Reference Manual”.
SCL
DAT
STA
STO
SDA
SCL
DAT
STA
STO
Clock Low Time 100 kHz mode
Clock High Time 100 kHz mode
SDAx and SCLx
Fall Time
SDAx and SCLx
Rise Time
Data Input
Setup Time
Data Input
Hold Time
Start Condition
Setup Time
Start Condition
Hold Time
Stop Condition
Setup Time
Stop Condition
Hold Time
Output Valid
From Clock
Bus Free Time
Bus Capacitive Loading
Characteristic
2
C Baud Rate Generator. Refer to Section 19. “Inter-Integrated Circuit™
400 kHz mode
1 MHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
20 + 0.1 C
20 + 0.1 C
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
Min
250
100
0.2
4.7
1.3
0.5
40
—
—
—
—
—
—
—
—
0
0
(1)
B
B
3500
1000
1000
Max
300
300
100
300
300
400
0.9
400
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
-40°C ≤ T
Units
pF
μs
μs
μs
μs
μs
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
ns
ns
ns
μs
μs
μs
μs
μs
μs
© 2009 Microchip Technology Inc.
A
≤ +85°C for Industrial
C
from 10 to 400 pF
C
from 10 to 400 pF
Only relevant for
Repeated Start
condition
After this period the
first clock pulse is
generated
Time the bus must be
free before a new
transmission can start
B
B
is specified to be
is specified to be
Conditions
—
—
—
—
—
—
—
—
—
—
—
—
—
—