DSPIC33FJ16GS502-E/SP Microchip Technology, DSPIC33FJ16GS502-E/SP Datasheet - Page 9

• Manufacturer Part Number: DSPIC33FJ16GS502-E/SP
• Description: 16 Bit MCU/DSP 40MIPS 16 KB FLASH SMPS 28 SPDIP .300in TUBE
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ16GS502-E/SP

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

18. Module: PGEC3/PGED3 Programming
19. Module: UART
20. Module: PWM
© 2010 Microchip Technology Inc.
When using the PGEC3/PGED3 pins for device
programming, the programming time may be
slower as compared to other available PGECx/
PGEDx pin pairs, because the Enhanced ICSP™
programming algorithm cannot be executed on
this pin pair.
Refer
Programming
additional information on this limitation.
Work around
Use alternate PGECx/PGEDx programming pin
pairs.
Affected Silicon Revisions
The UART module will not generate consecutive
break characters. Trying to perform a back-to-back
break character transmission will cause the UART
module to transmit the dummy character used to
generate the first break character instead of
transmitting the second break character. Break
characters are generated correctly if they are
followed by non-break character transmission.
Work around
None.
Affected Silicon Revisions
Cycle-by-cycle current limit operation does not
work when the PWM module is configured for
Center-Aligned mode.
Work around
None.
Affected Silicon Revisions
A2
A2
A2
X
X
X
A3
A3
A3
X
X
X
to
Pins
A4
A4
A4
the
X
X
X
Specification”
“dsPIC33F/PIC24H
(DS70152)
Flash
for
21. Module: PWM
22. Module: UART
During
Blanking (LEB) is triggered to start counting at a
rising edge of PWM and the PWM module has a
blanking time period less than the PWM assertive
time (T
during the T
T
ignored during T
after the T
However, the device fails to recognize the current
limit event after Ton time is over, when previously
described conditions exist.
Work around
Initialize the LEBCONx register as shown below,
which specifies the LEB function for the (CLSRC)
input to be triggered on the falling (trailing) edge of
PWM, and set the LEB delay to a minimum value
of 8 ns:
• PHF bit is set
• CLLEBEN bit is set
• LEB<9:3> bits are set to a minimum value of ‘1’
If the user application needs LEB to be triggered at
a falling edge, make sure that the LEB delay is set
for more than the T
Affected Silicon Revisions
When the UART is operating in 8-bit mode
(PDSEL = 0x) and using the IrDA encoder/decoder
(IREN = 1), the module incorrectly transmits a data
payload of 80h as 00h.
Work around
None.
Affected Silicon Revisions
ON
A2
A2
X
X
period is over, the current limit event should be
ON
A3
A3
X
X
normal
ON
time), and the current limit event occurs
ON
time is over.
A4
A4
X
X
period and is still pending after the
ON
ON
operation,
time, but should be recognized
time.
if
DS80439H-page 9
Leading-Edge