DSPIC33FJ16MC102-E/SO Microchip Technology, DSPIC33FJ16MC102-E/SO Datasheet - Page 181
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DSPIC33FJ16MC102-E/SO
Manufacturer Part Number
DSPIC33FJ16MC102-E/SO
Description
16-bit Motor Control DSC Family, 16 MIPS, 16KB Flash, 1KB RAM 28 SOIC .300in TUB
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet
1.DSPIC33FJ16GP101-IP.pdf
(322 pages)
Specifications of DSPIC33FJ16MC102-E/SO
Processor Series
dsPIC33F
Core
dsPIC
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
16 KB
Interface Type
SPI, I2C, UART, JTAG
Number Of Programmable I/os
35
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 125 C
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Core Processor
dsPIC
Core Size
16-Bit
Speed
16 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
Number Of I /o
21
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (0.295", 7.50mm Width)
Lead Free Status / Rohs Status
Details
- Current page: 181 of 322
- Download datasheet (5Mb)
REGISTER 17-3:
© 2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-10
bit 9-0
dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102
AMSK7
R/W-0
U-0
—
Unimplemented: Read as ‘0’
AMSKx: Mask for Address bit x Select bit
1 = Enable masking for bit x of incoming message address; bit match not required in this position
0 = Disable masking for bit x; bit match required in this position
AMSK6
R/W-0
U-0
—
I2CxMSK: I2Cx SLAVE MODE ADDRESS MASK REGISTER
W = Writable bit
‘1’ = Bit is set
AMSK5
R/W-0
U-0
—
AMSK4
R/W-0
U-0
—
Preliminary
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
AMSK3
R/W-0
U-0
—
AMSK2
R/W-0
U-0
—
x = Bit is unknown
AMSK9
AMSK1
R/W-0
R/W-0
DS70652C-page 181
AMSK8
AMSK0
R/W-0
R/W-0
bit 8
bit 0
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