DSPIC33FJ32MC204-E/ML Microchip Technology, DSPIC33FJ32MC204-E/ML Datasheet - Page 31
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DSPIC33FJ32MC204-E/ML
Manufacturer Part Number
DSPIC33FJ32MC204-E/ML
Description
16-bit DSC, 32KB Flash,Motor,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ32MC202-IMM.pdf
(320 pages)
2.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
3.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
Specifications of DSPIC33FJ32MC204-E/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 9x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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4.0
The dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
architecture features separate program and data memory
spaces and buses. This architecture also allows the direct
access of program memory from the data space during
code execution.
FIGURE 4-1:
© 2011 Microchip Technology Inc.
Note:
MEMORY ORGANIZATION
This data sheet summarizes the features
of
dsPIC33FJ16MC304 family of devices. It
is not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to
Section
(DS70202) of the “dsPIC33F/PIC24H
Family Reference Manual”, which is avail-
able
(www.microchip.com).
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
dsPIC33FJ32MC202/204
Interrupt Vector Table
Alternate Vector Table
Device Configuration
(11264 instructions)
the
GOTO Instruction
Unimplemented
Reset Address
Flash Memory
User Program
from
(Read ‘0’s)
Reserved
Registers
DEVID (2)
PROGRAM MEMORY MAPS FOR dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
DEVICES
Reserved
Reserved
dsPIC33FJ32MC202/204
4.
the
“Program
Microchip
0x000000
0x000002
0x000004
0x0000FE
0x000100
0x000104
0x0001FE
0x000200
0x0057FE
0x005800
0x7FFFFE
0x800000
0xF7FFFE
0xF80017
0xF80018
0xFEFFFE
0xFF0000
0xFFFFFE
0xF80000
Memory”
website
and
4.1
The
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
devices is 4M instructions. The space is addressable
by a 24-bit value derived either from the 23-bit Program
Counter (PC) during program execution, or from table
operation or data space remapping as described in
Section 4.6 “Interfacing Program and Data Memory
Spaces”.
User application access to the program memory space
is restricted to the lower half of the address range
(0x000000 to 0x7FFFFF). The exception is the use of
TBLRD/TBLWT operations, which use TBLPAG<7> to
permit access to the Configuration bits and Device ID
sections of the configuration memory space.
The memory maps for the dsPIC33FJ32MC202/204
and dsPIC33FJ16MC304 devices are shown in
Figure
program
4-1.
Program Address Space
Alternate Vector Table
dsPIC33FJ16MC304
Interrupt Vector Table
Device Configuration
(5632 instructions)
address
GOTO Instruction
Unimplemented
Reset Address
Flash Memory
User Program
(Read ‘0’s)
Reserved
DEVID (2)
Registers
Reserved
Reserved
memory
DS70283H-page 31
0x000000
0x000002
0x000004
0x0000FE
0x000100
0x000104
0x0001FE
0x000200
0x002BFE
0x002C00
0x7FFFFE
0x800000
0xF7FFFE
0xF80017
0xF80018
0xFEFFFE
0xFF0000
0xFFFFFE
0xF80000
space
of
the
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