DSPIC33FJ32MC204-E/ML Microchip Technology, DSPIC33FJ32MC204-E/ML Datasheet - Page 37
![16-bit DSC, 32KB Flash,Motor,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm TUBE](/photos/6/81/68122/150-44-qfn_sml.jpg)
DSPIC33FJ32MC204-E/ML
Manufacturer Part Number
DSPIC33FJ32MC204-E/ML
Description
16-bit DSC, 32KB Flash,Motor,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ32MC202-IMM.pdf
(320 pages)
2.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
3.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
Specifications of DSPIC33FJ32MC204-E/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 9x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- DSPIC33FJ32MC202-IMM PDF datasheet
- DSPIC33FJ32MC202-IMM PDF datasheet #2
- DSPIC33FJ32MC202-IMM PDF datasheet #3
- Current page: 37 of 320
- Download datasheet (5Mb)
TABLE 4-1:
TABLE 4-2:
TABLE 4-3:
CNEN1
CNEN2
CNPU1
CNPU2
Legend:
CNEN1
CNEN2
CNPU1
CNPU2
Legend:
XMODSRT
XMODEND
YMODSRT
YMODEND
XBREV
DISICNT
Legend:
SFR Name
Name
Name
SFR
SFR
Addr
0060
0062
0068
006A
Addr
006A
SFR
0060
0062
0068
SFR
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
004C
Addr
0048
004A
004E
0050
SFR
0052
CN15PUE CN14PUE CN13PUE CN12PUE CN11PUE
CN15PUE CN14PUE CN13PUE CN12PUE CN11PUE CN10PUE CN9PUE
CN15IE
CN15IE
Bit 15
Bit 15
CPU CORE REGISTERS MAP (CONTINUED)
CHANGE NOTIFICATION REGISTER MAP FOR dsPIC33FJ32MC202
CHANGE NOTIFICATION REGISTER MAP FOR dsPIC33FJ32MC204 and dsPIC33FJ16MC304
—
—
—
—
BREN
Bit 15
—
CN30PUE CN29PUE CN28PUE CN27PUE CN26PUE CN25PUE CN24PUE CN23PUE CN22PUE CN21PUE CN20PUE CN19PUE CN18PUE CN17PUE CN16PUE
CN30PUE CN29PUE
CN14IE
CN30IE
CN14IE
CN30IE
Bit 14
Bit 14
Bit 14
—
CN13IE
CN29IE
CN13IE
CN29IE
Bit 13
Bit 13
Bit 13
CN12IE
CN12IE
CN28IE
Bit 12
Bit 12
—
—
Bit 12
CN27PUE
CN11IE
CN27IE
CN11IE
CN27IE
Bit 11
Bit 11
Bit 11
CN10IE
CN26IE
Bit 10
Bit 10
—
—
—
—
Bit 10
CN25IE
CN9IE
Bit 9
Bit 9
—
—
—
—
Bit 9
CN24PUE CN23PUE CN22PUE CN21PUE
CN8PUE
XS<15:1>
XE<15:1>
YS<15:1>
YE<15:1>
CN24IE
CN24IE
CN8IE
Bit 8
Bit 8
—
—
Bit 8
Disable Interrupts Counter Register
CN7PUE
CN7PUE
XB<14:0>
CN23IE
CN23IE
CN7IE
CN7IE
Bit 7
Bit 7
Bit 7
CN6PUE
CN6PUE
CN22IE
CN22IE
CN6IE
CN6IE
Bit 6
Bit 6
Bit 6
CN5PUE
CN5PUE
CN21IE
CN21IE
CN5IE
CN5IE
Bit 5
Bit 5
Bit 5
CN4PUE
CN4PUE
CN20IE
CN4IE
Bit 4
CN4IE
Bit 4
Bit 4
—
—
CN3PUE
CN3PUE
Bit 3
CN19IE
CN3IE
CN3IE
Bit 3
Bit 3
—
—
Bit 2
CN2PUE
CN2PUE
CN2IE
CN18IE
CN2IE
Bit 2
Bit 2
—
—
Bit 1
CN1PUE
CN1PUE
CN1IE
CN17IE
CN1IE
Bit 1
Bit 1
—
—
Bit 0
CN16PUE
0
1
0
1
CN0PUE
CN0PUE
CN16IE
CN0IE
CN16IE
CN0IE
Bit 0
Bit 0
Resets
xxxx
xxxx
xxxx
xxxx
xxxx
xxxx
All
Resets
Resets
0000
0000
0000
0000
0000
0000
0000
0000
All
All
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