EP20K400CB652C7 Altera, EP20K400CB652C7 Datasheet - Page 44

• Manufacturer Part Number: EP20K400CB652C7
• Description: APEX 20KC
• Manufacturer: Altera

APEX 20KC Programmable Logic Device Data Sheet
Figure 28. APEX 20KC I/O Banks
Notes to
(1)
(2)
44
LVDS Output
Block (2)
I/O Bank 8
I/O Bank 7
For more information on placing I/O pins in LVDS blocks, refer to the “Guidelines for Using LVDS Blocks” section
in
If the LVDS input and output blocks are not used for LVDS, they can support all of the I/O standards and can be
used as input, output, or bidirectional pins with V
Application Note 120 (Using LVDS in APEX 20KE
Figure
(1)
28:
Power Sequencing & Hot Socketing
Because APEX 20KC devices can be used in a mixed-voltage environment,
they have been designed specifically to tolerate any possible power-up
sequence. Therefore, the V
powered in any order.
I/O Bank 6
I/O Bank 1
Regular I/O Banks Support
■
■
■
■
■
■
■
■
■
■
■
■
LVPECL
LVTTL
LVCMOS
2.5 V
1.8 V
3.3-V PCI
GTL+
HSTL
SSTL-2 Class I and II
SSTL-3 Class I and II
CTT
AGP
CCIO
Devices).
set to 3.3 V, 2.5 V, or 1.8 V.
CCIO
I/O Bank 2
and V
I/O Bank 5
Individual
Power Bus
CCINT
power supplies may be
Altera Corporation
I/O Bank 3
I/O Bank 4
(1)
LVDS Input
Block (2)