EPM570GT100I5N Altera, EPM570GT100I5N Datasheet - Page 34

• Manufacturer Part Number: EPM570GT100I5N
• Description: MAX II
• Manufacturer: Altera

Specifications of EPM570GT100I5N

• Family Name: MAX II
• Memory Type: Flash
• # Macrocells: 440
• Frequency (max): 1.8797GHz
• Propagation Delay Time: 8.7ns
• Number Of Logic Blocks/elements: 57
• # I/os (max): 76
• Operating Supply Voltage (typ): 1.8V
• In System Programmable: Yes
• Operating Supply Voltage (min): 1.71V
• Operating Supply Voltage (max): 1.89V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: TQFP
• Lead Free Status / Rohs Status: Compliant

2–26
Figure 2–21. Column I/O Block Connection to the Interconnect
Note to
(1) Each of the four IOEs in the column I/O block can have one data_out or fast_out output, one OE output, and one data_in input.
I/O Standards and Banks
MAX II Device Handbook
Figure
Local Interconnect
2–21:
I/O Block
LAB Local
Interconnect
Figure 2–21
MAX II device IOEs support the following I/O standards:
■
■
■
■
■
R4 Interconnects
3.3-V LVTTL/LVCMOS
2.5-V LVTTL/LVCMOS
1.8-V LVTTL/LVCMOS
1.5-V LVCMOS
3.3-V PCI
data_out
C4 Interconnects
[3..0]
shows how a column I/O block connects to the logic array.
LAB
4
[3..0]
OE
4
Column I/O Block
Interconnect
LAB Local
Interconnect
fast_out
Fast I/O
(Note 1)
[3..0]
Path
LAB
4
LAB Column
Clock [3..0]
4
data_in
[3..0]
C4 Interconnects
© October 2008 Altera Corporation
Column I/O
Block Contains
Up To 4 IOEs
LAB Local
Interconnect
Chapter 2: MAX II Architecture
LAB
I/O Structure