EPM7064AELC44-7 Altera, EPM7064AELC44-7 Datasheet - Page 7

• Manufacturer Part Number: EPM7064AELC44-7
• Description: MAX 7000/S/AE/B
• Manufacturer: Altera

Altera Corporation
Figure 1. MAX 7000A Device Block Diagram
Note:
(1)
EPM7032AE, EPM7064AE, EPM7128A, EPM7128AE, EPM7256A, and EPM7256AE devices have six output enables.
EPM7512AE devices have 10 output enables.
INPUT/OE2/GCLK2
INPUT/GCLRn
INPUT/GCLK1
INPUT/OE1
2 to 16 I/O
2 to 16 I/O
6 or 10 Output Enables (1)
Control
Control
Block
Block
I/O
I/O
Logic Array Blocks
The MAX 7000A device architecture is based on the linking of
high-performance LABs. LABs consist of 16-macrocell arrays, as shown in
Figure
is fed by all dedicated input pins, I/O pins, and macrocells.
Each LAB is fed by the following signals:
6
6
2 to 16
2 to 16
2 to 16
2 to 16
36 signals from the PIA that are used for general logic inputs
Global controls that are used for secondary register functions
Direct input paths from I/O pins to the registers that are used for fast
setup times
1. Multiple LABs are linked together via the PIA, a global bus that
LAB A
LAB C
Macrocells
Macrocells
33 to 48
1 to 16
2 to 16
2 to 16
16
16
36
36
MAX 7000A Programmable Logic Device Data Sheet
PIA
36
36
2 to 16
2 to 16
16
16
Macrocells
Macrocells
17 to 32
49 to 64
LAB D
LAB B
6 or 10 Output Enables (1)
2 to 16
2 to 16
2 to 16
2 to 16
Control
Control
Block
Block
I/O
I/O
6
6
2 to 16 I/O
2 to 16 I/O
7