epm7064ae Altera Corporation, epm7064ae Datasheet
epm7064ae
Manufacturer Part Number
epm7064ae
Description
Programmable Logic Device
Manufacturer
Altera Corporation
Datasheet
1.EPM7064AE.pdf
(64 pages)
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Features...
Altera Corporation
DS-M7000A-4.5
September 2003, ver. 4.5
f
For information on in-system programmable 5.0-V MAX 7000 or 2.5-V
MAX 7000B devices, see the
Data Sheet
High-performance 3.3-V EEPROM-based programmable logic
devices (PLDs) built on second-generation Multiple Array MatriX
(MAX
3.3-V in-system programmability (ISP) through the built-in
IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with
advanced pin-locking capability
–
–
Built-in boundary-scan test (BST) circuitry compliant with
IEEE Std. 1149.1
Supports JEDEC Jam Standard Test and Programming Language
(STAPL) JESD-71
Enhanced ISP features
–
–
–
Pin-compatible with the popular 5.0-V MAX 7000S devices
High-density PLDs ranging from 600 to 10,000 usable gates
Extended temperature range
MAX 7000AE device in-system programmability (ISP) circuitry
compliant with IEEE Std. 1532
EPM7128A and EPM7256A device ISP circuitry compatible with
IEEE Std. 1532
Enhanced ISP algorithm for faster programming (excluding
EPM7128A and EPM7256A devices)
ISP_Done bit to ensure complete programming (excluding
EPM7128A and EPM7256A devices)
Pull-up resistor on I/O pins during in-system programming
or the
®
) architecture (see
®
MAX 7000B Programmable Logic Device Family Data
MAX 7000AE
Includes
MAX 7000 Programmable Logic Device Family
Table
1)
Programmable Logic
MAX 7000A
Data Sheet
Device
Sheet.
1
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