EPM7512BFI256-7 Altera, EPM7512BFI256-7 Datasheet - Page 12

• Manufacturer Part Number: EPM7512BFI256-7
• Description: MAX 7000/S/AE/B
• Manufacturer: Altera

Specifications of EPM7512BFI256-7

• Family Name: MAX 7000B
• Memory Type: EEPROM
• # Macrocells: 512
• Number Of Usable Gates: 10000
• Frequency (max): 166.67MHz
• Propagation Delay Time: 7.5ns
• Number Of Logic Blocks/elements: 32
• # I/os (max): 212
• Operating Supply Voltage (typ): 2.5V
• In System Programmable: Yes
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (max): 2.625V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: FBGA
• Lead Free Status / Rohs Status: Not Compliant

MAX 7000B Programmable Logic Device Data Sheet
12
Figure 5. MAX 7000B PIA Routing
While the routing delays of channel-based routing schemes in masked or
field-programmable gate arrays (FPGAs) are cumulative, variable, and
path-dependent, the MAX 7000B PIA has a predictable delay. The PIA
makes a design’s timing performance easy to predict.
I/O Control Blocks
The I/O control block allows each I/O pin to be individually configured
for input, output, or bidirectional operation. All I/O pins have a tri-state
buffer that is individually controlled by one of the global output enable
signals or directly connected to ground or V
control block for MAX 7000B devices. The I/O control block has
six or ten global output enable signals that are driven by the true or
complement of two output enable signals, a subset of the I/O pins, or a
subset of the I/O macrocells.
PIA Signals
CC
.
Figure 6
Altera Corporation
shows the I/O
To LAB