EVAL-ADV7173EBZ Analog Devices Inc, EVAL-ADV7173EBZ Datasheet - Page 19

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EVAL-ADV7173EBZ

Manufacturer Part Number
EVAL-ADV7173EBZ
Description
EVALUATION BOARD
Manufacturer
Analog Devices Inc
Series
Advantiv®r
Datasheet

Specifications of EVAL-ADV7173EBZ

Main Purpose
Video, Video Processing
Embedded
No
Utilized Ic / Part
ADV7173
Primary Attributes
NTSC/PAL Digital Video Encoder
Secondary Attributes
I²C Interface
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Mode 1: Master Option HSYNC, BLANK, FIELD
(Timing Register 0 TR0 = X X X X X 0 1 1)
In this mode the ADV7172/ADV7173 can generate horizontal SYNC and Odd/Even FIELD signals. A transition of the FIELD
input when HSYNC is low indicates a new frame, i.e., vertical retrace. The BLANK signal is optional. When the BLANK input is
disabled, the ADV7172/ADV7173 automatically blanks all normally blank lines as per CCIR-624. Pixel data is latched on the rising
clock edge following the timing signal transitions. Mode 1 is illustrated in Figure 27 (NTSC) and Figure 28 (PAL). Figure 29 illus-
trates the HSYNC, BLANK, and FIELD for an odd-or-even field transition relative to the pixel data.
HSYNC
BLANK
FIELD
HSYNC
BLANK
FIELD
309
DISPLAY
622
DISPLAY
HSYNC
BLANK
310
FIELD
PIXEL
DATA
623
311
ODD FIELD
624
NTSC = 16
EVEN FIELD
PAL = 12
312
625
EVEN FIELD
CLOCK/2
CLOCK/2
313
ODD FIELD
1
314
2
315
3
VERTICAL BLANK
316
VERTICAL BLANK
4
317
5
318
6
319
PAL = 132
NTSC = 122
7
320
CLOCK/2
Cb
CLOCK/2
ADV7172/ADV7173
Y
21
Cr
334
22
Y
335
DISPLAY
23
DISPLAY
336

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