KS8721BL A4 Micrel Inc, KS8721BL A4 Datasheet

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KS8721BL/SL General Description Operating with a 2.5V core to meet low-voltage and low-power requirements, the KS8721BL and KS8721SL are 10BASE- T/100BASE-TX/FX Physical Layer Transceivers that use MII and RMII interfaces to transmit and receive data. They contain 10BASE-T Physical Medium ...

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KS8721BL/SL Features (continued) • LED outputs for link, activity, full-/half-duplex, collision, and speed • Supports back-to-back for media converter applications • Supports MDI/MDI-X auto-crossover • KS8721BL is a drop-in replacement for the KS8721BT in the same footprint ...

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KS8721BL/SL Revision History Revision Date Summary of Changes 0.90 1/12/04 Created. 1.0 3/06/04 Initial release. Change to new format. Add part-ordering information. Editorial changes on pin description, RMII, and media converter operation. Update circuit design, reset timing, thermal resistance, electrical ...

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KS8721BL/SL Table Of Contents Pin Description .............................................................................................................................................................6 Strapping Option ...........................................................................................................................................................9 Pin Configuration ........................................................................................................................................................10 Introduction ............................................................................................................................................................11 100BASE-TX Transmit ..........................................................................................................................................11 100BASE-TX Receive ........................................................................................................................................... 11 PLL Clock Synthesizer ..........................................................................................................................................11 Scrambler/De-scrambler (100BASE-TX only) ....................................................................................................... 11 10BASE-T Transmit ..............................................................................................................................................11 10BASE-T Receive ...............................................................................................................................................11 SQE and Jabber ...

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KS8721BL/SL Register Map (continued) Register 15h: RXER Counter .....................................................................................................................................21 Register 1bh: Interrupt Control/Status Register .....................................................................................................21 Register 1fh: 100BASE-TX PHY Controller ..............................................................................................................21 Absolute Maximum Ratings .........................................................................................................................................23 Operating Ratings .........................................................................................................................................................23 Electrical Characteristics .............................................................................................................................................23 Timing Diagrams ...........................................................................................................................................................25 Selection of Isolation Transformer ..............................................................................................................................32 Selection ...

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KS8721BL/SL Pin Description Pin Number Pin Name Type 1 MDIO I/O 2 MDC I 3 RXD3/ Ipd/O PHYAD 4 RXD2/ Ipd/O PHYAD2 5 RXD1/ Ipd/O PHYAD3 6 RXD0/ Ipd/O PHYAD4 7 VDDIO P 8 GND GND 9 RXDV/ Ipd/O CRSDV/ ...

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KS8721BL/SL Pin Number Pin Name Type 19 TXD2 Ipd 20 TXD3 Ipd 21 COL/RMII Ipd/O 22 CRS/ Ipd/O RMII_BTB 23 GND GND 24 VDDIO P 25 INT#/ Ipu/O PHYAD0 26 LED0/TEST Ipu/O 27 LED1/ Ipu/O SPD100/ nFEF 28 LED2/ Ipu/O ...

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KS8721BL/SL Pin Number Pin Name Type 31 VDDRX 32 RX- 10BASE- FXSD/FXEN Ipd/O 35 GND GND 36 GND GND 37 REXT 38 VDDRCV 39 GND GND 40 TX VDDTX tion 43 GND ...

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KS8721BL/SL (1) Strapping Options Pin Number Pin Name Type 6,5, PHYAD[4:1]/ Ipd/O 4,3 RXD[0:3] 25 PHYAD0/ Ipu/O INT# (3) 9 PCS_LPBK/ Ipd/O RXDV (3) 11 ISO/RXER Ipd/O (3) 21 RMII/COL Ipd/O (3) 22 RMII_BTB Ipd/O CRS 27 SPD100/ Ipu/O No ...

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KS8721BL/SL Pin Configuration MDIO 1 MDC 2 R3D3/PHYAD1 3 RXD2/PHYAD2 4 RXD1/PHYAD3 5 RXD0/PHYAD4 6 VDDIO 7 GND 8 RXDV/PCS_LPBK 9 RXC 10 RXER/ISO 11 GND 12 VDDC 13 TXER 14 TXC/REF_CLK 15 TXEN 16 TXD0 17 TXD1 18 TXD2 ...

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KS8721BL/SL Introduction 100BASE-TX Transmit The 100BASE-TX transmit function performs parallel to serial conversion, NRZ-to-NRZI conversion, and MLT-3 encoding and transmission. The circuitry starts with a parallel to serial conversion that converts the 25MHz, 4-bit nibbles into a 125MHz serial bit ...

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KS8721BL/SL half-duplex mode (please refer to “Auto-Negotiation”). Auto-negotiation is disabled in the FX mode. During auto-negotiation, the contents of Register 4, coded in fast link pulse (FLP), are sent to its link partner under the con- ditions of power-on, link-loss, ...

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KS8721BL/ end-of-frame (EOF) marker. Collision: Whenever the line state is half-duplex and the transmitter and receiver are active at the same time, the KS8721BL/ SL asserts its collision signal, which is asynchronous to any clock. RMII (Reduced MII) ...

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KS8721BL/SL Transmit Data [1:0] (TXD[1:0]) Transmit Data TXD[1:0] transitions synchronously with respect to REF_CLK. When TX_EN is asserted, TXD[1:0] are ac- cepted for transmission by the PHY. TXD[1:0] remains as “00” to indicate idle when TX_EN is de-asserted. Values of ...

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KS8721BL/SL Auto-Crossover (Auto-MDI/MDI-X) Automatic MDI/MDI-X configuration is intended to eliminate the need for crossover cables between similar devices. The assignment of pinouts for a 10/100 BASE-T crossover function cable is shown below. This feature eliminates the confusion in applications by ...

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KS8721BL/SL Power Management The KS8721BL/SL offers the following modes for power management: • Power-Down Mode: This mode can be achieved by writing to Register 0.11 or pulling pin 30 PD# low. • Power-Saving Mode: This mode can be disabled by ...

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KS8721BL/SL Circuit Design Reference for Power Supply Micrel’s integrated built-in, voltage regulator technology and thoughtful implementation allows the user to save BOM cost on both existing and future designs with the use of the new KS8721BL/SL single supply, single port ...

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KS8721BL/SL Register Map Register No. Description 0h Basic Control Register 1h Basic Status Register 2h PHY Identifi PHY Identifi Auto-Negotiation Advertisement Register 5h Auto-Negotiation Link Partner Ability Register 6h Auto-Negotiation Expansion Register 7h Auto-Negotiation Next Page ...

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KS8721BL/SL Address Name 1.10:7 Reserved 1.6 No Preamble 1.5 Auto-Negotiation Complete 1 = auto-negotiation process completed. 1.4 Remote Fault 1.3 Auto-Negotiation Ability 1.2 Link Status 1.1 Jabber Detect 1.0 Extended Capability Register 2h - PHY Identifier 1 2.15:0 PHY ID ...

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KS8721BL/SL Address Name 5.11:10 Pause 5.9 100 BASE-T4 5.8 100BASE-TX Full-Duplex 5.7 100BASE-TX 5.6 10BASE-T Full-Duplex 5.5 10BASE-T 5.4:0 Selector Field Register 6h - Auto-Negotiation Expansion 6.15:5 Reserved 6.4 Parallel Detection Fault 6.3 Link Partner Next Page Able 6.2 Next ...

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KS8721BL/SL Address Name Register 15h - RXER Counter 15.15:0 RXER Counter Register 1bh - Interrupt Control/Status Register 1b.15 Jabber Interrupt Enable 1b.14 Receive Error Interrupt Enable 1b.13 Page Received Interrupt Enable 1b.12 Parallel Detect Fault Interrupt Enable 1b.11 Link Partner ...

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KS8721BL/SL Address Name 1f.6 Enable Pause (Flow-Control Result) 1f.5 PHY Isolate 1f.4:2 Operation Mode Indication [000] = Still in auto-negotiation. 1f.1 Enable SQE Test 1f.0 Disable Data Scrambling Note: 1. RW: Read/Write, RO: Read Only, SC: Self Clear, LH: Latch ...

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KS8721BL/SL Absolute Maximum Ratings Storage Temperature (T ) ........................ –55°C to +150°C S Supply Referenced to GND ..........................–0.5V to +4.0V All Pins .........................................................–0.5V to +4.0V Important: Please read the Notes at the bottom of the page. Electrical Characteristics V = ...

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KS8721BL/SL Symbol Parameter 100BASE-TX Transmit (measured differentially after 1:1 transformer) Duty Cycle Distortion Overshoot V Reference Voltage of ISET SET Propagation Delay Jitters 10BASE-TX Receive R RX+/RX– Differential IN Input Resistance V Squelch Threshold SQ 10BASE-TX Transmit (measured differentially after ...

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KS8721BL/SL Timing Diagrams Symbol Parameter t TXD [3:0] Set-Up to TXC High SU1 t TXEN Set-Up to TXC High SU2 t TXD [3:0] Hold After TXC High HD1 t TXEN Hold After TXC High HD2 t TXEN High to CRS ...

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KS8721BL/SL TXC TXEN TXD[3:0], TXER CRS TX+/TX- Symbol Parameter t TXD [3:0] Set-Up to TXC High SU1 t TXEN Set-Up to TXC High SU2 t TXD [3:0] Hold After TXC High HD1 t TXER Hold After TXC High HD2 t ...

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KS8721BL/SL RX+/RX- CRS RXDV RXD[3:0] RXER RXC Symbol Parameter t RXC Period P t RXC Pulse Width WL t RXC Pulse Width WH t RXD [3:0], RXER, RXDV Set-Up to Rising Edge of RXC SU t RXD [3:0], RXER, RXDV ...

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KS8721BL/SL TX+/TX- TX+/TX- Figure 7. Auto-Negotiation/Fast Link Pulse Timing Symbol Parameter t FLP Burst to FLP Burst BTB t FLP Burst Width FLPW t Clock/Data Pulse Width PW t Clock Pulse to Data Pulse CTD t Clock Pulse to Clock ...

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KS8721BL/SL MDC MDI O (Into Ch ip) MDI O (Out of Chip) Symbol Parameter t MDC Period P t MDIO Set-Up to MDC (MDIO as Input) MD1 t MDIO Hold After MDC (MDIO as Input) MD2 t MDC to MDIO ...

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KS8721BL/SL Supply Voltage RST_N Strap-In Value Symbol Parameter t Stable Supply Voltages to Reset High sr Reset Circuit Diagram Micrel recommendeds the following discrete reset circuit as shown in Figure 10 when powering up the KS8721BL/SL device. For the application ...

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KS8721BL/SL Reference Circuit for Strapping Option Configuration Figure 12 shows the reference circuit for strapping option pins. Reference circuits for unmanaged programming through LED ports. Figure 12. Reference Circuit, Strapping Option Pins February 2005 3.3V 220 Pull-Up 10k LED pin ...

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KS8721BL/SL Selection of Isolation Transformer One simple 1:1 isolation transformer is needed at the line interface. An isolation transformer with integrated common-mode choke is recommended for exceeding FCC requirements. The following table gives recommended transformer character- istics. Characteristic Turns Ratio ...

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KS8721BL/SL Package Information February 2005 48-Pin SSOP (SM) 33 Micrel M9999-022105 ...

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KS8721BL/SL MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA + 1 (408) 944-0800 TEL The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for ...