KSZ8841-PMQL Micrel Inc, KSZ8841-PMQL Datasheet - Page 4

Single Ethernet Port + 32-bit/33MHz PCI Interface( )

KSZ8841-PMQL

Manufacturer Part Number
KSZ8841-PMQL
Description
Single Ethernet Port + 32-bit/33MHz PCI Interface( )
Manufacturer
Micrel Inc

Specifications of KSZ8841-PMQL

Controller Type
Ethernet Controller, MAC
Interface
Bus
Voltage - Supply
3.1 V ~ 3.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Operating Supply Voltage (typ)
3.3V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
576-1633 - BOARD EVALUATION KSZ8841-PMQL
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
576-2117
KSZ8841-PMQL

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KSZ8841-PMQL
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
KSZ8841-PMQLI
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
KSZ8841-PMQLI
Manufacturer:
MICREL/麦瑞
Quantity:
20 000
Magic Packet Frame Detection
Setting the Magic Packet RX Enable bit 7 (MPRXE) in the Wake Frame Control Register WFCR, places the
KSZ8841PMQL in the Magic Packet detection mode. In this mode, normal data reception is disabled and detection logic
within the MAC examines receiving data for a Magic Packet.
Once the KSZ8841PMQL has been put into Magic Packet Enable mode, the device will disable normal network activity
and will no longer generate any transmits. The device will monitor all incoming frames to determine if any of them is a
Magic Packet frame.
A Magic Packet must also meet the basic addressing requirements such as Source Address (SA), Destination Address
(DA), which may be the receiving station's MAC address, or a multicast or broadcast address, and CRC.
The Magic Packet has a specific sequence consisting of 16 duplications of the MAC address of this node, with no breaks
or interruptions. This sequence can be located anywhere within the packet, but must be preceded by a synchronization
stream. The synchronization stream allows the scanning state machine to be much simpler. The synchronization stream is
defined by 6 bytes of FFh. The device will also accept a broadcast frame, as long as the 16 duplications of the MAC
address match the address of the machine to be awakened.
If the MAC address for a particular node on a network is 11h 22h, 33h, 44h, 55h, 66h, the LAN controller will be scanning
for the data sequence (assuming an Ethernet frame):
DESTINATION SOURCE MISC: FF FF FF FF FF FF
11 22 33 44 55 66 11 22 33 44 55 66
11 22 33 44 55 66 11 22 33 44 55 66
11 22 33 44 55 66 11 22 33 44 55 66
11 22 33 44 55 66 11 22 33 44 55 66
11 22 33 44 55 66 11 22 33 44 55 66
11 22 33 44 55 66 11 22 33 44 55 66
11 22 33 44 55 66 11 22 33 44 55 66
11 22 33 44 55 66 11 22 33 44 55 66
MISC CRC
There are no further restrictions on a Magic Packet frame. For instance, the sequence could be in a TCP/IP packet or an
IPX packet. The frame may be bridged or routed across the network without affecting its ability to wake-up a node at the
frame's destination.
If the LAN controller scans a frame and does not find the specific sequence shown above, it discards the frame and takes
no further action. If the KSZ8841-PMQL detects this sort of the data sequence, then it can assert the PMEN pin to wake
up the system by the Magic Packet.
How to Set Magic Packet Frame
The following steps are required to place the KSZ8841PMQL into WoL Magic Packet mode:
Involved Control Registers and bits are shown in Table 3.
The system can bring the device out of the wake-up Magic Packet mode by setting MPRXE bit [7] = 0 in WFCR register.
Micrel, Inc.
Register
CPMC
WFCR
May 2007
1. Set PME_Enable bit 8 in CPMC register.
2. Set Magic Packet RX Enable bit [7] in WFCR Wake-Up Frame Control Register to enable the Magic Packet
pattern detection.
Bit
8
7
Name
PME_Enable
MPRXE
Table 3. Control Registers and Bits for Magic Packet Frame
Description
If this bit is set, the KSZ8841 can assert the PME_N pin. Otherwise, assertion
of the PME_N pin is disabled. This bit is cleared on power-up reset only and is
not modified by either hardware or software reset.
Magic Packet RX Enable
When set, it enables the Magic Packet pattern detection.
When reset, the Magic Packet pattern detection is disabled.
4
Application Note 142
M9999-050807-A
Default
0
0

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