LMP92001SQE/NOPB National Semiconductor, LMP92001SQE/NOPB Datasheet - Page 27

• Manufacturer Part Number: LMP92001SQE/NOPB
• Description: IC ANALOG MONITOR/CTLR 54LLP
• Manufacturer: National Semiconductor

Specifications of LMP92001SQE/NOPB

• Applications: General Purpose
• Current - Supply: 4mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 54-WFQFN Exposed Pad
• Operating Temperature (min): -40C
• Operating Temperature Classification: Automotive
• Operating Temperature (max): 125C
• Package Type: LLP EP
• Rad Hardened: No
• Supply Voltage Range: 4.75V To 5.5V
• Operating Temperature Range: -40°C To +125°C
• Digital Ic Case Style: LLP
• No. Of Pins: 54
• Peak Reflow Compatible (260 C): Yes
• Leaded Process Compatible: Yes
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LMP92001SQE/NOPBTR

Note that CDAC.OFF affects all OUTx, whereas Cy affects
only channels assigned to it. The correspondence between
16.3 TEMPERATURE SENSOR
The output voltage of the analog temperature sensor can be
sampled via ADC channel 17 input. The result of conversion
is stored in the ADC17 register.
Typical ADC output code as a function of temperature:
In the expression above VREF is the reference input voltage
to the internal ADC.
For best temperature measurement accuracy the exposed
DAP of the device should be soldered to the PCB's grounded
pad, and the power dissipation of the device should be limited.
16.4 ADC/DAC VOLTAGE REFERENCE
The on-board ADC and DACs require reference voltages for
their operation. By default the device is configured to accept
external references applied to AREF and DREF pins respec-
tively. In this configuration AREF and DREF can be at differ-
ent potentials.
The external reference voltage sources should be bypassed
to ground with capacitance appropriate for those particular
sources. See example application schematic in
Application Circuit
Device Pin Cy
C1
C2
C3
C4
Example.
FIGURE 6. Asynchronous Output Control
TABLE 1. Cy to OUTx Assignment
Section 17.0
CDAC:GANG = 0
OUT[9:12]
OUT[1:4]
OUT[5:6]
OUT[7:8]
27
Cy control inputs and OUTx outputs is governed by the
CDAC.GANG bit and is outlined in
The device also has a built in precision reference block which
can be used to provide VREF potential to either ADC or DACs,
or both at once. The internal buffers are designed to provide
necessary drive to ADC and DAC blocks. The internal refer-
ence buffers are not intended to drive external loads.
When internal reference is enabled the capacitance at AREF
or DREF pins should be limited to 50 pF.
The functional diagram of the reference selector is shown in
Figure
NOTE: Internal reference drive must be disabled when cor-
responding
CREF.AEXT=1 when applying external AREF.
7.
external
reference
CDAC:GANG = 1
OUT[10:12]
OUT[1:3]
OUT[4:6]
OUT[7:9]
Table
is
applied;
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1.
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