AD9860BST Analog Devices Inc, AD9860BST Datasheet - Page 25

• Manufacturer Part Number: AD9860BST
• Description: IC FRONT-END MIXED-SGNL 128-LQFP
• Manufacturer: Analog Devices Inc

Specifications of AD9860BST

• Rohs Status: RoHS non-compliant
• Rf Type: LMDS, MMDS
• Features: 10-bit ADCs, 12-bit DACs
• Package / Case: 128-LQFP
• Operating Supply Voltage (max): 3.9V
• Operating Temp Range: -40C to 70C
• Operating Temperature Classification: Commercial
• Package Type: LQFP
• Mounting: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Not Compliant

CLKSEL
REV. 0
Low
ADC
Div 2
Div
Div
No
CLKIN
ADC SAMPLE RATE
(NOT TO EXCEED 64MHz)
Decimation
Decimation
Decimation
Decimation
Decimate
Table Ia. CLKSEL Set Logic Low
Rx DATA TIMING No. 1
Rx DATA TIMING No. 2
Rx DATA TIMING No. 3
Rx DATA TIMING No. 4
No
No
A
f
f
f
Rx
Rx
Rx
f
= CLKOUT 4
= CLKOUT 2
Rx
= 2 CLKOUT
0: B = A
1: B = A/2
ADC DIV2
f
= CLKOUT
Multiplex
CLKOUT1
No Mux
No Mux
No Mux
No Mux
Figure 10. Single Tx Timing Block Diagram, Alternative Operation
Mux
Mux
Mux
Mux
DLL OUTPUT RATE
(NOT TO EXCEED 128MHz)
Rx Data(MUXED) = 2
Rx Data(MUXED) = 2
Rx Data(MUXED) = CLKOUT1
B
Rx Data = 1⁄2
CLKOUT1 = 1⁄2
CLKOUT1 = 1⁄2
CLKOUT1 = 1⁄2
CLKOUT1 = 1⁄2
CLKOUT1 = 1⁄2
Rx Data = 2
Rx Data = 2
CLOUT1 = 1⁄2
CLOUT1 = 1⁄2
Rx Data = CLKOUT1
DLL MULT
00: C = B
01: C = B/2
10: C = B/4
t
See Figure 8 for
Relative Timing
R 1
t
Timing No. 4
Timing No. 3
Timing No. 4
Timing No. 3
Timing No. 4
Timing No. 2
Timing No. 3
Not Allowed
R 2
Table I. Rx Data Timing Table
Figure 9. Rx Timing Diagram
CLKOUT1
CLKOUT1
CLKOUT1
CLKIN
CLKIN
CLKIN
CLKOUT1
CLKOUT1
CLKIN
CLKIN
CLKIN
CLKIN
C
CLKOUT2 DIV
00: D = C
01: D = C/2
10: D = C/4
–25–
CLKOUT2
CLKSEL
High
t
R 3
t
R 1
ADC
Div 2
INPUT Tx DATA RATE
(SINGLE CHANNEL)
Div
Div
No
D
Decimation
Decimation
Decimation
Decimation
Table Ib. CLKSEL Set Logic High
Decimate Multiplex
00: E = D
01: E = 2
10: E = 4
No
No
INTERP
D
D
No Mux
No Mux
No Mux
No Mux
Mux
Mux
Mux
Mux
E
AD9860/AD9862
Rx Data(MUXED) = 1⁄2
TxDAC UPDATE RATE
SINGLE CHANNEL
(CANNOT EXCEED
DLL OUTPUT RATE)
Rx Data(MUXED) = 2
Rx Data(MUXED) = CLKOUT1
Rx Data(MUXED) = CLKOUT1
Rx Data = 1⁄2
Rx Data = 1⁄4
Rx Data = 1⁄2
Rx Data = CLKOUT1
CLKOUT1 = CLKIN
CLKOUT1 = CLKIN
CLKOUT1 = CLKIN
CLKOUT1 = CLKIN
CLKOUT1 = CLKIN
CLKOUT1 = CLKIN
CLOUT1 = CLKIN
CLOUT1 = CLKIN
See Figure 8 for
Relative Timing
Timing No. 3
Timing No. 4
Timing No. 2
Timing No. 3
Timing No. 2
Timing No. 3
Timing No. 1
Timing No. 2
CLKOUT1
CLKOUT1
CLKOUT1
CLKOUT1
CLKOUT1