LTC4215CGN#TR Linear Technology, LTC4215CGN#TR Datasheet - Page 17

• Manufacturer Part Number: LTC4215CGN#TR
• Description: IC,Power Control/Management,CMOS,SSOP,16PIN,PLASTIC
• Manufacturer: Linear Technology

Specifications of LTC4215CGN#TR

• Linear Misc Type: Positive Low Voltage
• Family Name: LTC4215
• Package Type: SSOP N
• Operating Supply Voltage (min): 2.9V
• Operating Supply Voltage (max): 15V
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Product Depth (mm): 3.99mm
• Product Height (mm): 1.5mm
• Mounting: Surface Mount
• Pin Count: 16
• Lead Free Status / Rohs Status: Not Compliant

APPLICATIONS INFORMATION
pin low. The undervoltage lockout circuit has a 2μs fi lter
time after V
2μs to shut the GATE off, but it is recommended to add a
fi lter capacitor C
by a transient. Eventually either the UV pin or undervoltage
lockout responds to bring the current under control before
the supply completely collapses.
Supply Transient Protection
The LTC4215 is safe from damage with supply voltages up
to 24V. However, spikes above 24V may damage the part.
During a short-circuit condition, large changes in current
fl owing through power supply traces may cause inductive
voltage spikes which exceed 24V. To minimize such spikes,
the power trace inductance should be minimized by using
wider traces or heavier trace plating. Also, a snubber circuit
dampens inductive voltage spikes. Build a snubber by using
a 100Ω resistor in series with a 0.1μF capacitor between
V
input can also prevent damage from voltage surges.
Design Example
As a design example, take the following specifi cations:
V
C
= 11.6V, and I
design is shown in Figure 1.
Selection of the sense resistor, R
threshold of 25mV:
The MOSFET is sized to handle the power dissipation dur-
ing inrush when output capacitor C
A method to determine power dissipation during inrush
is based on the principle that:
DD
IN
L
= 330μF , V
Energy in CL = Energy in Q1
R
= 12V, I
and GND. A surge suppressor, Z1 in Figure 1, at the
S
=
25
I
MAX
MAX
mV
DD
UV(ON)
2
drops below 2.74V. The UV pin reacts in
= 5A, I
C ADDRESS = 1010011. This completed
=
F
0 005
to prevent unwanted shutdown caused
.
= 10.75V, V
INRUSH
Ω
= 1A, dI/dt
OV(OFF)
S
, is set by the overcurrent
OUT
= 14.0V, V
INRUSH
is being charged.
= 10A/ms,
PWRGD(UP)
This uses:
or 0.024 joules. Calculate the time it takes to charge up
C
The power dissipated in the MOSFET:
The SOA (safe operating area) curves of candidate MOSFETs
must be evaluated to ensure that the heat capacity of the
package tolerates 6W for 4ms. The SOA curves of the
Fairchild FDC653N provide for 2A at 12V (24W) for 10ms,
satisfying this requirement. Since the FDC653N has less
than 8μF of gate capacitance and we are using a GATE
RC network, the short circuit stability of the current limit
should be checked and improved by adding a capacitor
from GATE to SOURCE if needed.
The inrush current is set to 1A using C1:
The inrush dI/dt is set to 10A/ms using C
OUT
Energy in C
P
C
C
C
t
STARTUP
DISS
1
1 0 33
SS
:
=
=
=
=
C
=
L
.
dI dt
1000 0 0
10
Energyin C
•
/
I
t
mF
=
μA
INRUSH
I
STARTUP
I
SS
GATE
L
C
⎛
⎝ ⎜
LTC4215/LTC4215-2
L
=
•
• .
A
s
•
20
0 0375
2
1
I
⎞
⎠ ⎟
1
INRUSH
CV
A
μA
V
• .
L
0 0375
DD
2
=
or C
=
•
6
2
1
=
5
W
m
(
0 33
1 6
1
0 33
•
.
Ω
=
.
R
SENSE
=
mF
mF
.8 8 nF
1
7 5
.
•
)( )
nF
12
12
1
A
SS
V
2
:
=
4
ms
17
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