UPA1890GR-9JG-E2-A Renesas Electronics America, UPA1890GR-9JG-E2-A Datasheet - Page 3

• Manufacturer Part Number: UPA1890GR-9JG-E2-A
• Description: MOSFET N/P-CH 30V 8-SOIC
• Manufacturer: Renesas Electronics America

Specifications of UPA1890GR-9JG-E2-A

• Fet Type: N and P-Channel
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 27 mOhm @ 3A, 10V
• Drain To Source Voltage (vdss): 30V
• Current - Continuous Drain (id) @ 25° C: 6A, 5A
• Vgs(th) (max) @ Id: 2.5V @ 1mA
• Gate Charge (qg) @ Vgs: 14nC @ 10V
• Input Capacitance (ciss) @ Vds: 748pF @ 10V
• Power - Max: 2W
• Mounting Type: Surface Mount
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document No.
Date Published
Printed in Japan
ORDERING INFORMATION
ABSOLUTE MAXIMUM RATINGS (T
Remark
DESCRIPTION
by a 4.0-V power source.
switching characteristics, and is suitable for applications such as
power switch of portable machine and so on.
FEATURES
Notes 1. PW
Drain to Source Voltage
Gate to Source Voltage
Drain Current (DC)
Drain Current (pulse)
Total Power Dissipation
Channel Temperature
Storage Temperature
The PA1890 is a switching device which can be driven directly
The PA1890 features a low on-state resistance and excellent
Built-in G-S protection diode against ESD
N-Channel R
P-Channel R
Can be driven by a 4.0-V power source
Low on-state resistance
PART NUMBER
PA1890GR-9JG
2. Mounted on ceramic substrate of 5000 mm
G14762EJ2V0DS00 (2nd edition)
May 2001 NS CP(K)
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
R
R
R
R
N- AND P-CHANNEL MOS FIELD EFFECT TRANSISTOR
DS(on)2
DS(on)3
DS(on)1
DS(on)2
DS(on)3
DS(on)1
10 s, Duty Cycle
= 37 m
= 47 m
= 37 m
= 56 m
= 64 m
Note1
= 27 m
Note2
MAX. (V
MAX. (V
MAX. (V
MAX. (V
MAX. (V
MAX. (V
I
D(pulse)
I
V
V
Power TSSOP8
D(DC)
T
T
P
DSS
GSS
stg
ch
PACKAGE
T
N-Channel / P-Channel
1%
GS
GS
GS
GS
GS
GS
A
= 10 V, I
= 4.5 V, I
= 4.0 V, I
= –10 V, I
= –4.5 V, I
= –4.0 V, I
–55 to +150
The mark
= 25°C)
FOR SWITCHING
6.0
30/–30
20/ m 20
24
150
2.0
DATA SHEET
/
/
m 5.0
m 20
D
D
D
D
= 3.0 A)
D
D
= 3.0 A)
= 3.0 A)
2
= –2.5 A)
= –2.5 A)
= –2.5 A)
x 1.1 mm
shows major revised points.
MOS FIELD EFFECT TRANSISTOR
°C
°C
W
V
V
A
A
8
1
Gate1
Gate
Protection
Diode
3.15 ±0.15
3.0 ±0.1
0.27
0.65
PACKAGE DRAWING (Unit: mm)
N-Channel
+0.03
–0.08
5
4
0.8 MAX.
Source1
EQUIVALENT CIRCUIT
Drain1
To keep good radiate condition,
it is recommended that all pins
are soldering to print board.
0.10 M
1
2, 3 :Source1
4
5
6, 7 :Source2
8
:Drain1
:Gate1
:Gate2
:Drain2
Body
Diode
PA1890
Gate2
Gate
Protection
Diode
1.2 MAX.
6.4 ±0.2
4.4 ±0.1
©
1.0±0.05
0.1±0.05
P-Channel
3
+5
–3
Source2
Drain2
0.5
0.6
1.0 ±0.2
Body
Diode
0.25
0.1
+0.15
–0.1
2000