SL28DB200AZI Silicon Laboratories Inc, SL28DB200AZI Datasheet - Page 2

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SL28DB200AZI

Manufacturer Part Number
SL28DB200AZI
Description
Clock Generators & Support Products PCIe fam 1diff input 2 diff outputs
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SL28DB200AZI

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Pin Description
Notes: I=Input, O=Output, DIF=Differential signal, SE=Single Ended, PWR=Power input, GND=Ground
Table 1. Buffer Power-up State Machine
......................... Document #: 38-07722 Rev *C Page 2 of 8
2,3
5,6,13,12
7,11
15
1
16
8,10,14
4,9
State
S0
S1
S2
S3
Pin
3.3V Buffer power off
After 3.3V supply is detected to rise above 1.8V - 2.0V, the buffer enters state 1 and initiates a 0.2-ms–0.3-ms delay
Buffer waits for a valid clock on the SRCIN input
Once a valid input is detected, the buffer enters state 3 and enables outputs for normal operation
SRCIN, SRCIN#
SRC[1:2], SRC[1:2]#
OE[1:2]#
IREF
VDDA
VSSA
VDD
VSS
Name
O,DIF 0.7V Differential Clock Outputs
Figure 1. Buffer Power-up State Diagram
PWR
PWR
Type
I,DIF
GND
GND
I,SE
I
0.7V Differential inputs
3.3V LVTTL input for enabling differential outputs
A precision resistor 475 ohmis attached to this pin to set the differential
output current
3.3V Power Supply
Ground
3.3V power supply for outputs
Ground for outputs
Description
Description
SL28DB200

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