SL2305ZC-1 Silicon Laboratories Inc, SL2305ZC-1 Datasheet - Page 6

• Manufacturer Part Number: SL2305ZC-1
• Description: Clock Buffer 10-140MHz 5 Outputs ZDB 3.3V
• Manufacturer: Silicon Laboratories Inc

Specifications of SL2305ZC-1

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Switching Specifications:
Notes:
Rev 2.1, October 22, 2007
Symbol
FMAX1
INDC
OUTDC1
OUTDC2
tr/f
t1
t2
t3
tPLOCK
CCJ
1. For the given maximum loading conditions. See CL in Operating Conditions Table.
2. Parameter is guaranteed by design and characterization. Not 100% tested in production.
Delay Time, CLKIN Rising
Description
Maximum Frequency
(Input=Output )
All Active PLL Modes
Input Duty Cycle
Output Duty Cycle
Output Duty Cycle
Rise, Fall Time (3.3V)
(Measured at: 0.8 to 2.0V)
Output-to-Output Skew
(Measured at VDD/2)
Product-to-Product Skew
(Measured at VDD/2)
Edge to CLKOUT Rising
Edge
PLL Lock Time
Cycle-to-cycle Jitter
[2]
[2]
[2]
[2]
[2]
[1]
[2]
[2]
Unless otherwise stated VDD=3.3V+/-10% and both C and I Grades
[2]
Condition
High drive (-1H). All outputs CL=15pF
High drive (-1H), All outputs CL=30pF
Standard drive, (-1), All outputs CL=15pf
Standard drive, (-1), All outputs CL=30pf
Measured at 1.4V, Fout=66MHz,
CL=15pF
Measured at 1.4V, Fout≥50MHz,
CL=15pF
Measured at 1.4V, Fout≤50MHz,
CL=15pF
High drive (-1H), CL=10pF
High drive (-1H), CL=30pF
Standard drive (-1), CL=10pF
Standard drive (-1), CL=30pF
All outputs CL=0 or equally loaded, -1 or
-1H drives
All outputs CL=0 or equally loaded, -1 or
-1H drives
Measured at VDD/2
Time from 90% of VDD to valid clocks on
all the output clocks
Fin=Fout=66 MHz, <CL=15pF, -1H drive
Fin=Fout=66 MHz, <CL=15pF, -1 drive
Fin=Fout=66 MHz, <CL=30pF, -1H drive
Fin=Fout=66 MHz, <CL=30pF, -1 drive
Min
–220
10
10
10
10
30
40
45
–
–
–
–
–
–
–
–
–
–
–
Max
140
100
100
150
400
220
140
150
160
170
1.5
1.8
2.2
2.5
1.0
66
70
60
55
SL2305
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Unit
MHz
MHz
MHz
MHz
ms
ns
ns
ns
ns
ps
ps
ps
ps
ps
ps
ps
%
%
%