PI6C180VEX Pericom Semiconductor, PI6C180VEX Datasheet - Page 5

• Manufacturer Part Number: PI6C180VEX
• Description: Clock Buffer Precision 1 18 Clock Buffer
• Manufacturer: Pericom Semiconductor

Specifications of PI6C180VEX

• Number Of Outputs: 18
• Propagation Delay (max): 5 ns
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 3.135 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Package / Case: SSOP-48
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Minimum & Maximum Expected
Capacitive Loads
Notes:
1.
2.
3.
SDRAM
Clock
Maximum rise/fall times are guaranteed at maximum
specified load.
Minimum rise/fall times are guaranteed at minimum
specified load.
Rise/fall times are specified with pure capacitive
load as shown.
Testing is done with an additional 500-ohm resistor
in parallel.
Load
Min.
20
Load
Max.
30
Waveform
Interface
Clocking
Input
Units
Waveform
(TTL)
pF
3.3V
Output
2.4
1.5
0.4
SDRAM DIMM
Specfication
t plh
t SDRISE
Notes
1.5V
Figure 1. Clock Waveforms
tSDKH
Output
Buffer
1.5V
t SDFALL
tSDKP
5
Design Guidelines to Reduce EMI
1. Place series resistors and CI capacitors as close as possible to
2. Minimize the number of “vias” of the clock traces.
3. Route clock traces over a continuous ground plane or over
4. Position clock signals away from signals that go to any cables
Test Load
the respective clock pins. Typical value for CI is 10pF. Series
resistor value can be increased to reduce EMI provided that
the rise and fall time are still within the specified values.
a continuous power plane. Avoid routing clock traces from
plane to plane (refer to rule #2).
or any external connectors.
tSDKL
Test
Point
1.5V
1.5V
t phl
Precision 1-18 Clock Buffer
PS8141F
PI6C180
12/13/04