PI6C20400ALEX Pericom Semiconductor, PI6C20400ALEX Datasheet

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PI6C20400ALEX

Manufacturer Part Number
PI6C20400ALEX
Description
Clock Buffer 1:4 PCI Express Gen 2 Zero Delay Buffer
Manufacturer
Pericom Semiconductor
Datasheet

Specifications of PI6C20400ALEX

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PI6C20400ALEX
Manufacturer:
PERICOM
Quantity:
20 000
Company:
Part Number:
PI6C20400ALEX
Quantity:
74
Features
• Phase jitter filter for PCIe® 2.0 application
• Four Pairs of Differential Clocks
• Low skew < 50ps
• Low jitter < 50ps cycle-to-cycle
• < 1 ps additive RMS phase jitter
• Output Enable for all outputs
• Outputs tristate control via SMBus
• Programmable PLL Bandwidth
• 100 MHz PLL Mode operation
• 100 - 400 MHz Bypass Mode operation
• 3.3V Operation
• Packaging (Pb-free and Green):
→28-Pin TSSOP (L28)
Block Diagram
→28-Pin SSOP (H28)
PLL/BYPASS#
OE_0 & OE_3
SRC_STOP#
SRC#
PWRDWN#
SRC
PLL_BW#
10-0181
OE_INV
SCLK
SDA
PLL
Controller
Output
Control
SMBus
DIV
OUT0
OUT0#
OUT1
OUT1#
OUT2
OUT2#
OUT3
OUT3#
1
Description
Pericom Semiconductor's PI6C20400A is a PCIe® 2.0 compliant
high-speed, low-noise differential clock buffer designed to be
companion to PI6C410BS. The device distributes the differential
SRC clock from PI6C410BS to four differential pairs of clock
outputs either with or without PLL. The clock outputs are
controlled by input selection of SRC_STOP#, PWRDWN# and
SMBus, SCLK and SDA. When input of either SRC_STOP#
or PWRDWN# is low, the output clocks are Tristated. When
PWRDWN# is low, the SDA and SCLK inputs must be Tri-stated.
Pin Configuration
1:4 Clock Driver for Intel PCIe® Chipsets
PLL/BYPASS#
OUT0#
OUT1#
SRC#
OUT0
OUT1
SCLK
OE_0
SRC
SDA
V
V
V
V
DD
DD
DD
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
PI6C20400A
V
V
I
OE_INV
V
OUT3
OUT3#
OE_3
OUT2
OUT2#
V
PLL_BW#
SRC_STOP#
PWRDWN#
REF
DD_A
SS_A
DD
DD
PS9062
06/14/10

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PI6C20400ALEX Summary of contents

Page 1

Features • Phase jitter filter for PCIe® 2.0 application • Four Pairs of Differential Clocks • Low skew < 50ps • Low jitter < 50ps cycle-to-cycle • < additive RMS phase jitter • Output Enable for all outputs • Outputs tristate control via SMBus • Programmable PLL Bandwidth • 100 MHz PLL Mode operation • 100 - 400 MHz Bypass Mode operation • 3.3V Operation • Packaging (Pb-free and Green): →28-Pin SSOP (H28) →28-Pin TSSOP (L28) Block Diagram OE_INV OE_0 & OE_3 Output SRC_STOP# Control PWRDWN# SMBus SCLK Controller ...

Page 2

Pin Descriptions Pin Name Type SRC & SRC# Input OE_0 & OE_3 Input OE_INV Input OUT[0:3] & OUT[0:3]# Output PLL/BYPASS# Input SCLK Input SDA I/O IREF Input SRC_STOP# Input PLL_BW# Input PWRDWN# Input V Power DD VSS Ground VSS_A Ground VDD_A Power Serial Data Interface ...

Page 3

Data Byte 0: Control Register Bit Descriptions Outputs Mode Divide Normal PLL/BYPASS Fanout 1 = PLL PLL Bandwidth High Bandwidth Low Bandwidth 3 Reserved 4 Reserved 5 Reserved SRC_STOP Driven when stopped 1 = Tristate PWRDWN Driven when stopped 1 = Tristate Data Byte 1: Control Register Bit Descriptions ...

Page 4

Data Byte 2: Control Register Bit Descriptions 0 Reserved 1 Allow control of OUTPUTS with assertion of SRC_STOP Free running Stopped with SRC_Stop# 3 Reserved 4 Reserved 5 Allow control of OUTPUTS with assertion of SRC_STOP Free running Stopped with SRC_Stop# 7 Reserved Data Byte 3: Control Register Bit Descriptions Reserved 4 ...

Page 5

Functionality PWRDWN# OUT 1 Normal 0 I × Float REF Power Down (PWRDWN# assertion) PWRDWN# OUT OUT# Power Down (PWRDWN# De-assertion) PWRDWN# OUT OUT# 10-0181 1:4 Clock Driver for Intel PCIe® Chipsets OUT# SRC_Stop# Normal 1 Low 0 Figure 1. Power ...

Page 6

Current-mode output buffer characteristics of OUT[0:3], OUT[0:3 (3.3V ± 5 Iout V = 0.85V max OUT Figure 9. Simplified diagram of current-mode output buffer Differential Clock Buffer characteristics Symbol OUT Current ...

Page 7

Absolute Maximum Ratings (Over operating free-air temperature range) Symbol V 3.3V Core Supply Voltage DD_A V 3.3V I/O Supply Voltage DD V Input High Voltage IH V Input Low Voltage IL Ts Storage Temperature V ESD Protection ESD Note: 1. Stress beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. DC Electrical Characteristics Symbol Parameters V 3.3V Core Supply Voltage DD_A V 3.3V I/O Supply Voltage DD V 3.3V Input High Voltage IH V ...

Page 8

AC Switching Characteristics Symbol PLL Mode F IN Bypass Mode Rise and Fall Time (measured between 0.175V to 0.525V) rise fall DT / rise Rise and Fall Time Variation DT fall PLL Mode T pd Non-PLL Mode T Cycle – Cycle Jitter jitter V Voltage High including overshoot HIGH V Voltage Low including undershoot LOW V Absolute crossing point voltages cross DV Total Variation of Vcross over all edges cross T ...

Page 9

Packaging Mechanical: 28-Pin SSOP (H) 08-0143 10-0181 1:4 Clock Driver for Intel PCIe® Chipsets 28-Pin, 209-Mil Wide, SSOP H28 ...

Page 10

... Ordering Code PI6C20400AHE PI6C20400ALE Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging Pb-free and Green 3. Adding an X suffix = Tape/Reel Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com 10-0181 ® ® PCIe , and the PCI EXPRESS design mark are trademarks of PCI-SIG 1:4 Clock Driver for Intel PCIe® Chipsets ...

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