DS1672U-33/T&R Maxim Integrated Products, DS1672U-33/T&R Datasheet - Page 13

• Manufacturer Part Number: DS1672U-33/T&R
• Description: Real Time Clock Low Voltage I2C-Comp atibleTime Keeping C
• Manufacturer: Maxim Integrated Products

Figures 7 and 8 detail how data transfer is accomplished on the I
R/W bit, two types of data transfer are possible:
1) Data transfer from a master transmitter to a slave receiver. The first byte transmitted by the
2) Data transfer from a slave transmitter to a master receiver. The first byte (the slave address) is
The master device generates all of the serial clock pulses and the START and STOP conditions. A
transfer is ended with a STOP condition or with a repeated START condition. Since a repeated START
condition is also the beginning of the next serial transfer, the bus will not be released.
The DS1672 can operate in the following two modes:
1) Slave receiver mode (DS1672 write mode): Serial data and clock are received through SDA and
2) Slave transmitter mode (DS1672 read mode): The first byte is received and handled as in the slave
master is the slave address. Next follows a number of data bytes. The slave returns an acknowledge
bit after each received byte.
transmitted by the master. The slave then returns an acknowledge bit. Next follows a number of data
bytes transmitted by the slave to the master. The master returns an acknowledge bit after all received
bytes other than the last byte. At the end of the last received byte, a “not acknowledge” is returned.
SCL. After each byte is received, an acknowledge bit is transmitted. START and STOP conditions are
recognized as the beginning and end of a serial transfer. Address recognition is performed by
hardware after reception of the slave address and direction bit (Figure 7). The slave address byte is the
first byte received after the START condition is generated by the master. The slave address byte
contains the 7-bit DS1672 address, which is 1101000, followed by the direction bit (R/W), which for
a write is a 0. After receiving and decoding the slave address byte the DS1672 outputs an
acknowledge on the SDA line. After the DS1672 acknowledges the slave address + write bit, the
master transmits a word address to the DS1672. This will set the register pointer on the DS1672, with
the DS1672 acknowledging the transfer. The master may then transmit zero or more bytes of data,
with the DS1672 acknowledging each byte received. The register pointer will increment after each
byte is transferred. The master will generate a stop condition to terminate the data write.
receiver mode. However, in this mode, the direction bit will indicate that the transfer direction is
reversed. Serial data is transmitted on SDA by the DS1672 while the serial clock is input on SCL.
START and STOP conditions are recognized as the beginning and end of a serial transfer (Figure 8).
The slave address byte is the first byte received after the START condition is generated by the master.
The slave address byte contains the 7-bit DS1672 address, which is 1101000, followed by the
direction bit (R/W), which for a read is a 1. After receiving and decoding the slave address byte the
DS1672 outputs an acknowledge on the SDA line. The DS1672 then begins to transmit data starting
with the register address pointed to by the register pointer. If the register pointer is not written to
before the initiation of a read mode the first address that is read is the last one stored in the register
pointer. The DS1672 must receive a “not acknowledge” to end a read.
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C bus. Depending upon the state of the