LAN9500I-ABZJ-TR SMSC, LAN9500I-ABZJ-TR Datasheet

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LAN9500I-ABZJ-TR

Manufacturer Part Number
LAN9500I-ABZJ-TR
Description
Ethernet ICs USB 2.0 to 10/100 Ethernet CTRL TR
Manufacturer
SMSC
Datasheet

Specifications of LAN9500I-ABZJ-TR

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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PRODUCT FEATURES
SMSC LAN950x Family
Highlights
Target Applications
Key Features
Single Chip Hi-Speed USB 2.0 to 10/100 Ethernet
Integrated 10/100 Ethernet MAC with Full-Duplex
Integrated 10/100 Ethernet PHY with HP Auto-MDIX
Integrated USB 2.0 Hi-Speed Device Controller
Integrated USB 2.0 Hi-Speed PHY
Implements Reduced Power Operating Modes
Embedded Systems
Set-Top Boxes
PVR’s
CE Devices
Networked Printers
USB Port Replicators
Standalone USB to Ethernet Dongles
Test Instrumentation
Industrial
USB Device Controller
High-Performance 10/100 Ethernet Controller
Controller
Support
support
— Fully compliant with Hi-Speed Universal Serial Bus
— Supports HS (480 Mbps) and FS (12 Mbps) modes
— Four endpoints supported
— Supports vendor specific commands
— Integrated USB 2.0 PHY
— Remote wakeup supported
— Fully compliant with IEEE802.3/802.3u
— Integrated Ethernet MAC and PHY
— 10BASE-T and 100BASE-TX support
— Full- and half-duplex support
— Full- and half-duplex flow control
— Preamble generation and removal
— Automatic 32-bit CRC generation and checking
— Automatic payload padding and pad removal
— Loop-back modes
— TCP/UDP/IP/ICMP checksum offload support
Specification Revision 2.0
1
= LAN9500A/LAN9500Ai only
DATASHEET
Power and I/Os
Miscellaneous Features
Software
Packaging
Environmental
— Flexible address filtering modes
— Wakeup packet support
— Integrated Ethernet PHY
— Support for 3 status LEDs
— External MII and Turbo MII support HomePNA™ and
— Various low power modes
— NetDetach feature increases battery life
— Supports PCI-like PME wake
— 11 GPIOs
— Supports bus-powered and self-powered operation
— Integrated power-on reset circuit
— Single external 3.3v I/O supply
— EEPROM Controller
— Supports custom operation without EEPROM
— IEEE 1149.1 (JTAG) Boundary Scan
— Requires single 25 MHz crystal
— Windows XP/Vista Driver
— Linux Driver
— Win CE Driver
— MAC OS Driver
— EEPROM Utility
— 56-pin QFN (8x8 mm) Lead-Free RoHS Compliant
— Commercial Temperature Range (0°C to +70°C)
— Industrial Temperature Range (-40°C to +85°C)
LAN9500/LAN9500i
LAN9500A/LAN9500Ai
USB 2.0 to 10/100
Ethernet Controller
HomePlug® PHY
– One 48-bit perfect address
– 64 hash-filtered multicast addresses
– Pass all multicast
– Promiscuous mode
– Inverse filtering
– Pass all incoming with status report
– Auto-negotiation
– Automatic polarity detection and correction
– HP Auto-MDIX support
– Link status change wake-up detection
– Internal core regulator
1
Revision 1.0 (05-17-10)
1
Datasheet
1

Related parts for LAN9500I-ABZJ-TR

LAN9500I-ABZJ-TR Summary of contents

Page 1

... Automatic payload padding and pad removal — Loop-back modes — TCP/UDP/IP/ICMP checksum offload support 1 = LAN9500A/LAN9500Ai only SMSC LAN950x Family LAN9500/LAN9500i LAN9500A/LAN9500Ai USB 2.0 to 10/100 Ethernet Controller — Flexible address filtering modes – One 48-bit perfect address – 64 hash-filtered multicast addresses – ...

Page 2

... LAN9500-ABZJ for 56-pin, QFN lead-free RoHS compliant package (0 to +70°C temp range) LAN9500i-ABZJ for 56-pin, QFN lead-free RoHS compliant package (-40 to +85°C temp range) LAN9500A-ABZJ for 56-pin, QFN lead-free RoHS compliant package (0 to +70°C temp range) LAN9500Ai-ABZJ for 56-pin, QFN lead-free RoHS compliant package (-40 to +85°C temp range) ...

Page 3

... Chapter 5 EEPROM Controller (EPC 5.1 EEPROM Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.2 EEPROM Defaults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.3 EEPROM Auto-Load 5.4 Examples of EEPROM Format Interpretation 5.4.1 LAN9500/LAN9500i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.4.2 LAN9500A/LAN9500Ai . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 5.5 Customized Operation Without EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Chapter 6 PME Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Chapter 7 NetDetach Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Chapter 8 Operational Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 8.1 Absolute Maximum Ratings 8.2 Operating Conditions** ...

Page 4

... Chapter 9 Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Chapter 10 Datasheet Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Revision 1.0 (05-17-10) USB 2.0 to 10/100 Ethernet Controller 4 DATASHEET Datasheet SMSC LAN950x Family ...

Page 5

... Figure 8.5 MII Transmit Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Figure 8.6 MII Receive Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Figure 8.7 Turbo MII Transmit Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Figure 8.8 Turbo MII Receive Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Figure 9.1 LAN950x 56-QFN Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Figure 9.2 LAN950x 56-QFN Recommended PCB Land Pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 SMSC LAN950x Family 5 DATASHEET Revision 1.0 (05-17-10) ...

Page 6

... Table 5.2 Configuration Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 5.3 GPIO PME Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 5.4 EEPROM Defaults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 5.5 Dump of EEPROM Memory - LAN9500/LAN9500i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 5.6 EEPROM Example - 256 Byte EEPROM - LAN9500/LAN9500i . . . . . . . . . . . . . . . . . . . . . . . 31 Table 5.7 Dump of EEPROM Memory - LAN9500A/LAN9500Ai Table 5.8 EEPROM Example - 256 Byte EEPROM - LAN9500A/LAN9500Ai . . . . . . . . . . . . . . . . . . . . 36 Table 8 ...

Page 7

... X X LAN9500Ai X X The LAN9500/LAN9500i and LAN9500A/LAN9500Ai are pin compatible. However, the value of the required EXRES resistor and other system components differ between devices. Refer to the LAN950x reference schematics for additional information. SMSC LAN950x Family Table 1.1 provides a summary of the feature differences between family Table 1 ...

Page 8

... For LAN9500A/LAN9500Ai: 0 Ohm 49.9 49.9 49.9 49.9 Ohm Ohm Ohm Ohm Ethernet Magnetics/RJ45 R2 For LAN9500/LAN9500i: 12.4K Ohm 1% For LAN9500A/LAN9500Ai: 12.0K Ohm 1% For LAN9500/LAN9500i: 1M Ohm 1% For LAN9500A/LAN9500Ai: Do Not Populate R3 25.000MHz 33pF 33pF 8 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet To Ethernet SMSC LAN950x Family ...

Page 9

... Packet", "Wake On LAN", and "Link Status Change" wake events. These wake events can be programmed to initiate a USB remote wakeup. An internal EEPROM controller exists to load various USB configuration information and the device MAC address. The integrated IEEE 1149.1 compliant TAP controller provides boundary scan via JTAG. SMSC LAN950x Family 10/100 FIFO Ethernet ...

Page 10

... PHY. This option allows support for HomePNA and HomePlug applications. The Ethernet MAC/PHY supports numerous power management wakeup features, including “Magic Packet”, “Wake on LAN”, and “Link Status Change”. Eight wakeup frame filters are provided by LAN9500A/LAN9500Ai, while LAN9500/LAN9500i support four. 2.1.5 Power Management The LAN950x features four SUSPEND2, and SUSPEND3 ...

Page 11

... Custom operation without EEPROM is also provided (LAN9500A/LAN9500Ai only). 2.1.7 General Purpose I/O When configured for internal PHY mode eleven GPIOs are supported. All GPIOs can serve as remote wakeup events when the LAN950x suspended state. SMSC LAN950x Family 11 DATASHEET Revision 1.0 (05-17-10) ...

Page 12

... TXD0/GPIO4/EEP_DISABLE 56 Note: ** This pin is a no-connect (NC) for LAN9500A/LAN9500Ai, but may be connected to VDD33A for backward compatibility with LAN9500/LAN9500i. Note: *** For LAN9500A/LAN9500Ai this pin provides additional PME related functionality. Refer to the respective pin descriptions and information. Note: **** For LAN9500A/LAN9500Ai GPIO7 may provide additional PHY Link Up related functionality ...

Page 13

... Mode Only) Management Data (External PHY Mode) General Purpose I/O 1 (Internal PHY 1 Mode Only) SMSC LAN950x Family Table 3.1 MII Interface Pins BUFFER SYMBOL TYPE RXER IS In external PHY mode, the signal on this pin is input from the external PHY and indicates a (PD) receive error in the packet ...

Page 14

... DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet DESCRIPTION (LAN9500A/LAN9500Ai ONLY): GPIO7 may provide additional PHY Link Up related functionality. A 3-wire style 1K/2K/4K EEPROM that is organized for 128 x 8-bit or 256/512 x 8-bit operation must be used. for more information on for more information on SMSC LAN950x Family ...

Page 15

... Configuration strap values are latched on power-on reset and system reset. Configuration straps are identified by an underlined symbol name. Signals that function as configuration straps must be augmented with an external resistor when connected to a load. SMSC LAN950x Family Table 3.1 MII Interface Pins (continued) BUFFER ...

Page 16

... The EECS output may tri-state briefly during power-up. Some EEPROM devices may be prone to false selection during this time. When an EEPROM is used, an external pull-down resistor is recommended on this signal to prevent false selection. Refer to your EEPROM manufacturer’s datasheet for additional information. for more information on SMSC LAN950x Family ...

Page 17

... PHY Mode) JTAG Test Data Input (Internal PHY Mode) 1 Receive Data 3 (External PHY Mode) SMSC LAN950x Family Table 3.3 JTAG Pins BUFFER SYMBOL TYPE nTRST IS In internal PHY mode, this active-low pin functions as the JTAG test port reset input. (PU) RXD0 ...

Page 18

... By default this pin is configured as a GPIO. (LAN9500A/LAN9500Ai only) This pin may serve as the PME_MODE_SEL input when External PHY and PME modes of operation are in effect. Refer to Chapter 6, "PME Operation," on page 40 for additional information. By default this pin is configured as a GPIO. SMSC LAN950x Family ...

Page 19

... Upstream VBUS Power 1 Test 1 1 Test 2 1 Test 3 1 SMSC LAN950x Family Table 3.4 Miscellaneous Pins (continued) BUFFER SYMBOL TYPE OD12 This pin is driven low (LED on) when the Ethernet operating speed is 100Mbs, or during auto- (PU) negotiation. This pin is driven high during 10Mbs operation, or during line isolation ...

Page 20

... The functionality of this pin may be swapped to USB DMINUS via the PORT_SWAP configuration strap. Chapter 4, "Power Connections," on and the device reference schematic for This pin can also be driven by a single- ended clock oscillator. When this method is used, XO should be left unconnected DESCRIPTION SMSC LAN950x Family ...

Page 21

... Refer to the device reference schematic for connection information. Note: EXRES AI Used for the internal bias circuits. Connect to an external resistor to ground. For LAN9500A/LAN9500Ai use 12.0K, 1%. For LAN9500/LAN9500i use 12.4K, 1%. VDDPLL P This pin must be connected to VDDCORE for proper operation. Refer to page 24 additional connection information. ...

Page 22

... TEST2 Note 3.3 This pin is a no-connect (NC) for LAN9500A/LAN9500Ai, but may be connected to VDD33A for backward compatibility with LAN9500/LAN9500i. Note 3.4 For LAN9500A/LAN9500Ai this pin provides additional PME related functionality. Refer to the respective pin descriptions and information. Revision 1.0 (05-17-10) PIN PIN NAME ...

Page 23

... When connected to a load that must be pulled low, an external resistor must be added. AI Analog input AIO Analog bi-directional ICLK Crystal oscillator input pin OCLK Crystal oscillator output pin P Power pin SMSC LAN950x Family Table 3.10 Buffer Types DESCRIPTION 23 DATASHEET Revision 1.0 (05-17-10) ...

Page 24

... Internal Core Regulator (IN) (OUT) Core Logic PLL & Ethernet PHY USB PHY Figure 4.1 Power Connections 24 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet VDDCORE VDDCORE 1 F 0.1 ESR 0.5A 120 @ 100MHz VDDPLL 0.1 F 0.5A 120 @ 100MHz VDDUSBPLL 0.1 F SMSC LAN950x Family ...

Page 25

... MAC Address [23:16] 04h MAC Address [31:24] 05h MAC Address [39:32] 06h MAC Address [47:40] 07h Full-Speed Polling Interval for Interrupt Endpoint 08h Hi-Speed Polling Interval for Interrupt Endpoint SMSC LAN950x Family Table 5.1 EEPROM Format EEPROM CONTENTS 25 DATASHEET Revision 1.0 (05-17-10) ...

Page 26

... Bit -> GPIO(x+8) Pin Enabled for Wakeup Use. Note: 20h (LAN9500A/LAN9500Ai Only) GPIO PME Flags Note: EEPROM byte addresses past the indicated address can be used to store data for any purpose: LAN9500/LAN9500i - 1Dh LAN9500A/LAN9500Ai - 20h Revision 1.0 (05-17-10) Table 5.1 EEPROM Format (continued) Bits 7:3 Unused. 26 DATASHEET USB 2 ...

Page 27

... Power Method 0 = The device is bus powered The device is self powered. SMSC LAN950x Family Table 5.2 Configuration Flags DESCRIPTION FUNCTION Speed Indicator Link and Activity Indicator Full Duplex Link Indicator Speed Indicator Link Indicator Activity Indicator 27 DATASHEET ...

Page 28

... GPIO PME is signaled this bit is ignored this bit is ignored this bit is ignored this bit is ignored. 28 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet GPIO PME Length bit of this flag GPIO PME Polarity bit of SMSC LAN950x Family ...

Page 29

... Note: The Configuration Flags are affected by the PWR_SEL and RMT_WKP straps. SMSC LAN950x Family Table 5.3 GPIO PME Flags (continued) DESCRIPTION is 0, this bit is ignored. Table 5.4 EEPROM Defaults DEFAULT VALUE FFFFFFFFFFFFh 0424h DEVICE LAN9500/LAN9500i LAN9500A/LAN9500Ai 29 DATASHEET Table 5.4. 01h 04h 04h FAh ...

Page 30

... Note: The USB reset only loads the MAC address. 5.4 Examples of EEPROM Format Interpretation 5.4.1 LAN9500/LAN9500i Table 5.5 and Table 5.6 case of LAN9500/LAN9500i. Table 5.6 illustrates, byte by byte, how the EEPROM is formatted. Table 5.5 Dump of EEPROM Memory - LAN9500/LAN9500i OFFSET BYTE 0000h 0008h 0010h 0018h 0020h 0028h 0030h 0038h ...

Page 31

... USB 2.0 to 10/100 Ethernet Controller Datasheet Table 5.6 EEPROM Example - 256 Byte EEPROM - LAN9500/LAN9500i EEPROM EEPROM CONTENTS ADDRESS (HEX) 00h A5 01h - 06h 07h 01 08h 04 09h 04 0Ah - 0Bh 09 04 0Ch 0A 0Dh 0F 0Eh 10 0Fh 14 10h 10 11h 1C 12h 00 13h 00 14h 00 15h 00 16h 12 17h 24 18h ...

Page 32

... Table 5.6 EEPROM Example - 256 Byte EEPROM - LAN9500/LAN9500i (continued) EEPROM EEPROM CONTENTS ADDRESS (HEX) 20h-27h 28h 10 29h 03 2Ah-37h 38h 10 39h 03 3Ah-47h 48h 12 49h 01 4Ah-4Bh 00 02 4Ch FF 4Dh 00 4Eh 01 4Fh 40 50h-51h 24 04 52h-53h 00 95 54h-55h 00 01 56h 01 57h 02 58h 03 59h 01 5Ah 09 5Bh ...

Page 33

... USB 2.0 to 10/100 Ethernet Controller Datasheet Table 5.6 EEPROM Example - 256 Byte EEPROM - LAN9500/LAN9500i (continued) EEPROM EEPROM CONTENTS ADDRESS (HEX) 64h 04 65h 00 66h 00 67h 03 68h FF 69h 00 6Ah FF 6Bh 00 6Ch 12 6Dh 01 6Eh-6Fh 00 02 70h FF 71h 00 72h 01 73h 40 74h-75h 24 04 76h-77h 00 95 78h-79h ...

Page 34

... Table 5.6 EEPROM Example - 256 Byte EEPROM - LAN9500/LAN9500i (continued) EEPROM EEPROM CONTENTS ADDRESS (HEX) 88h 04 89h 00 8Ah 00 8Bh 03 8Ch FF 8Dh 00 8Eh FF 8Fh 00 90h- FFh - Revision 1.0 (05-17-10) DESCRIPTION Descriptor Type (Interface Descriptor - 04h) Number identifying this Interface Value used to select alternative setting ...

Page 35

... SMSC LAN950x Family provide an example of how the contents of a EEPROM are formatted in the Table 5 dump of the EEPROM memory (256-byte EEPROM), VALUE ...

Page 36

... Full-Speed Configuration and Interface Descriptor Length (18bytes) Full-Speed Configuration and Interface Descriptor Word Offset (42h) Corresponds to EEPROM Byte Offset 84h GPIO7:0 Wake Enables - GPIO7:0 Not Used For Wakeup Signaling GPIO10:8 Wake Enables - GPIO10 Used For Wakeup Signaling 36 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet SMSC LAN950x Family ...

Page 37

... Driver, GPIO10 Active High Detection. PAD BYTE - Used To Align Following Descriptor on WORD Boundary Size of Manufacturer ID String Descriptor (10 bytes) Descriptor Type (String Descriptor - 03h) Manufacturer ID String (“SMSC” in UNICODE) Size of Product Name String Descriptor (18 bytes) Descriptor Type (String Descriptor - 03h) Product Name String (“LAN9500A” in UNICODE) ...

Page 38

... Index of Product String Descriptor Index of Serial Number String Descriptor Number of Possible Configurations Size of Full-Speed Configuration Descriptor in bytes (9 bytes) Descriptor Type (Configuration Descriptor - 02h) Total length in bytes of data returned (0027h = 39 bytes) Number of Interfaces 38 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet SMSC LAN950x Family ...

Page 39

... Attribute Register Initialization Descriptor RAM Initialization Enable Descriptor RAM and Flag Attribute Registers as Source Inhibit Reset of Select System Control and Status Register Elements SMSC LAN950x Family DESCRIPTION Value to use as an argument to select this configuration Index of String Descriptor describing this configuration Bus powered and remote wakeup enabled ...

Page 40

... LAN9500A/LAN9500Ai. Enable Embedded Controller Revision 1.0 (05-17-10) Host Processor Chipset DP/DM PME VBUS_DET PME_CLEAR PME_MODE_SEL Figure 6.1 Typical Application 40 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet Figure 6.1 illustrates HC LAN9500A/ LAN9500Ai EEPROM SMSC LAN950x Family ...

Page 41

... Note: When in PME mode, nRESET or POR will always cause the contents of the EEPROM to be reloaded. Note: GPIO10 may be used in PME and External PHY mode to connect to an external PHY’s Link LED, in order to generate a PHY Link Up wake event. SMSC LAN950x Family Figure 6.1 assumes that the Host Processor and the Chipset are powered or GPIO7:0 Wakeup Enables Enables ...

Page 42

... Note: A POR occurring when PME_MODE_SEL = 1 and an EEPROM present with the GPIO PME Enable set results in the device entering PME Mode. Revision 1.0 (05-17-10 (enabled (PME signaled via level on GPIO pin (NA (high level signals event (Push-Pull (Magic Packet wakeup (Active-low detection) 42 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet SMSC LAN950x Family ...

Page 43

... Device Has EEPROM With GPIO PME Enable =1, Enters PME Mode Wakeup Event Detected Device Asserts PME EC To Wake System To Process Wakeup Event? EC Asserts PME_CLEAR Device Resets And Deasserts PME SMSC LAN950x Family Or Via Circuitry False By Device? True EC Detects PME Yes No EC Signals Enable To Host ...

Page 44

... LED would be connected to a GPIO. Ethernet SMSC LAN9500A/ LAN9500Ai ...ZZZ Revision 1.0 (05-17-10) 1 Remove Ethernet Cable 2 USB Electricals Detach Battery-powered Netbook PC 3 may enter C3 sleep mode Figure 7.1 Device Detach 44 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet . SMSC LAN950x Family ...

Page 45

... USB 2.0 to 10/100 Ethernet Controller Datasheet Ethernet SMSC LAN9500A/ LAN9500Ai SMSC LAN950x Family 1 Insert Ethernet Cable 2 USB Electricals Attach LAN9500A enumerates and 3 the driver is loaded Figure 7.2 Device Attach 45 DATASHEET Revision 1.0 (05-17-10) ...

Page 46

... Note 8 +70 Note 8.5 +/-8kV for LAN9500/LAN9500i, +/-5kV for LAN9500A/LAN9500Ai Note 8.6 Performed by independent 3rd party test facility. *Stresses exceeding those listed in this section could cause permanent damage to the device. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Functional operation of the device at any condition exceeding those indicated in Section 8.2, " ...

Page 47

... Note: All current consumption and power dissipation values were measured at VDD33IO and VDD33A equal to 3.3V. 8.3.1 SUSPEND0 Table 8.1 Power Consumption/Dissipation - SUSPEND0 (LAN9500/LAN9500i) PARAMETER Supply current (VDD33IO, VDD33A) (Device Only) Power Dissipation (Device Only) Power Dissipation (Device and Ethernet components) Table 8 ...

Page 48

... Supply current (VDD33IO, VDD33A) (Device Only) Power Dissipation (Device Only) Power Dissipation (Device and Ethernet components) 8.3.3 SUSPEND2 Table 8.5 Power Consumption/Dissipation - SUSPEND2 (LAN9500/LAN9500i) PARAMETER Supply current (VDD33IO, VDD33A) (Device Only) Power Dissipation (Device Only) Power Dissipation (Device and Ethernet components) Table 8 ...

Page 49

... Supply current (VDD33IO, VDD33A) (Device Only) Power Dissipation (Device Only) Power Dissipation (Device and Ethernet components) 8.3.5 Operational Table 8.8 Operational Power Consumption/Dissipation (LAN9500/LAN9500i) PARAMETER 100BASE-TX Full Duplex (USB High-Speed) Supply current (VDD33IO, VDD33A) (Device Only) Power Dissipation (Device Only) Power Dissipation (Device and Ethernet components) ...

Page 50

... Power Dissipation (Device Only) Power Dissipation (Device and Ethernet components) 8.3.6 Customer Evaluation Board Operational Current Consumption*** Table 8.10 CEB Operational Current Consumption (LAN9500/LAN9500i) PARAMETER 100BASE-TX Full Duplex (USB High-Speed) Total SMSC Customer Evaluation Board Current Consumption Table 8.11 CEB Operational Current Consumption (LAN9500A/LAN9500Ai) ...

Page 51

... ICLK Type Buffer (XI Input) Low Input Level V High Input Level V Note 8.7 This specification applies to all inputs and tri-stated bi-directional pins. Internal pull-down and pull-up resistors add +/- 50uA per-pin (typical). SMSC LAN950x Family Table 8.12 I/O Buffer Characteristics MIN TYP -0.3 ILI IHI 1.01 1 ...

Page 52

... OS SYMBOL MIN TYP MAX V 2.2 2.5 OUT V 300 420 585 DS 52 DATASHEET Datasheet UNITS NOTES mVpk Note 8.10 mVpk Note 8.10 % Note 8.10 5.0 nS Note 8.10 0.5 nS Note 8. Note 8. 1.4 nS Note 8.12 UNITS NOTES 2.8 V Note 8.13 mV SMSC LAN950x Family ...

Page 53

... Universal Serial Bus Revision 2.0 specification for detailed USB timing information. 8.5.1 Equivalent Test Load Output timing specifications assume the 25pF equivalent test load illustrated in unless otherwise specified. OUTPUT SMSC LAN950x Family 25 pF Figure 8.1 Output Equivalent Test Load 53 DATASHEET Figure 8.1 below, Revision 1 ...

Page 54

... Figure 8.2 Power-On Configuration Strap Valid Timing Table 8.15 Power-On Configuration Strap Valid Timing SYMBOL t Configuration strap valid time cfg Revision 1.0 (05-17-10) 2.0V t cfg DESCRIPTION 54 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet MIN TYP MAX UNITS 15 mS SMSC LAN950x Family ...

Page 55

... Configuration strap pins setup to nRESET deassertion css t Configuration strap pins hold after nRESET deassertion csh t Output drive after deassertion odad SMSC LAN950x Family t rstia t t css csh t odad Figure 8.3 nRESET Reset Pin Timing DESCRIPTION 55 DATASHEET ...

Page 56

... Figure 8.4 EEPROM Timing Table 8.17 EEPROM Timing Values MIN 1110 550 550 1070 30 550 550 90 0 580 0 1070 56 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet t csl t cklcsl t ckldis t dhcsl TYP MAX UNITS 1130 ns 570 ns 570 600 SMSC LAN950x Family ...

Page 57

... TXD[3:0], TXEN output valid from rising edge of val TXCLK t TXD[3:0], TXEN output hold from rising edge of hold TXCLK Note 8.14 Timing was designed for system load between 10 pf and 25 pf. SMSC LAN950x Family t clkp t t clkh clkl t t val val ...

Page 58

... Figure 8.6 MII Receive Timing Table 8.19 MII Receive Timing Values MIN 40 t *0.4 clkp t *0.4 clkp 8.0 9.0 58 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet t hold t su MAX UNITS NOTES ns t *0.6 ns clkp t *0.6 ns clkp ns Note 8.15 ns Note 8.15 SMSC LAN950x Family ...

Page 59

... TXD[3:0], TXEN output valid from rising edge of val TXCLK t TXD[3:0], TXEN output hold from rising edge of hold TXCLK Note 8.16 Timing was designed for system load between 10 pf and 15 pf. SMSC LAN950x Family t clkp t t clkh clkl t t val val ...

Page 60

... Figure 8.8 Turbo MII Receive Timing MIN 20 t *0.4 clkp t *0.4 clkp 5 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet t hold t su MAX UNITS NOTES ns t *0.6 ns clkp t *0.6 ns clkp ns Note 8.17 ns Note 8.17 SMSC LAN950x Family ...

Page 61

... The XO/XI pin and PCB capacitance values are required to accurately calculate the value of the two external load capacitors. These two external load capacitors determine the accuracy of the 25.000 MHz frequency. SMSC LAN950x Family Table 8.22 for the recommended crystal specifications. ...

Page 62

... Center Pad to Pin Clearance 62 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet REMARKS Overall Package Height Standoff Mold Cap Thickness X/Y Body Size X/Y Mold Cap Size X/Y Exposed Pad Size Terminal Length Terminal Width Terminal Pitch SMSC LAN950x Family ...

Page 63

... The pin 1 identifier may vary, but is always located within the zone indicated. Figure 9.2 LAN950x 56-QFN Recommended PCB Land Pattern SMSC LAN950x Family 63 DATASHEET Revision 1.0 (05-17-10) ...

Page 64

... Chapter 10 Datasheet Revision History REVISION LEVEL AND DATE SECTION/FIGURE/ENTRY Rev. 1.0 Initial Release (05-17-10) Revision 1.0 (05-17-10) Table 10.1 Customer Revision History 64 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet CORRECTION SMSC LAN950x Family ...

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