COM20020I3V-DZD-TR SMSC, COM20020I3V-DZD-TR Datasheet - Page 64

no-image

COM20020I3V-DZD-TR

Manufacturer Part Number
COM20020I3V-DZD-TR
Description
Network Controller & Processor ICs 5Mbps ARCNET CTRL 2K x 8 ON-CHIP RAM
Manufacturer
SMSC
Datasheet

Specifications of COM20020I3V-DZD-TR

Mounting Style
SMD/SMT
Package / Case
PLCC-28
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
COM20020I3V-DZD-TR
Manufacturer:
Microchip Technology
Quantity:
10 000
Revision 12-05-06
(Internal Clk)
nPULSE2
nPULSE1
nTXEN
RXIN
Above values are for 2.5 Mbps.
Other Data Rates are shown below.
T
*t5, t6 = T
*t2, t7, t10 = T
*t3, t11 = T
**t9 =
**t13 =
DR
t1
t2
t3
t4
t5
t6
t7
t8
t9
t13
t10
t11
t12
is the Data Rate Period
4
7
5
4
x T
(These signals are to and from the differential driver or the cable)
Beginning Last Bit Time to nTXEN High**
nPULSE2 High to nTXEN Low
nPULSE1 Pulse Width
nPULSE1 Period
nPULSE2 Low to nPULSE1 Low
nPULSE2 High Time
nPULSE2 Low Time
nPULSE2 Period
nPULSE2 High to nTXEN High
(First Rising Edge on nPULSE2 after Last Bit Time)
nTXEN Low to first nPULSE1 Low**
RXIN Active Pulse Width
RXIN Period
RXIN Inactive Pulse Width
x T
DR
t1
DR
DR
/4
DR
Figure 8.12 - Backplane Mode Transmit or Receive Timing
DR
+/- 50 nS
+/- 50 nS
/2
t9
t4
t10
Parameter
DATASHEET
t11
t2
t5
Page 64
t12
t7
t3
t6
5Mbps ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip RAM
(400 nS BIT TIME)
min
-25
650
-25
450
-25
10
20
LAST BIT
200*
400*
200*
400*
100*
100*
200*
typ
t13
max
750
550
50
50
50
units
SMSC COM20020I Rev D
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
t8
Datasheet

Related parts for COM20020I3V-DZD-TR