E-TDA7437N STMicroelectronics, E-TDA7437N Datasheet
E-TDA7437N
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E-TDA7437N Summary of contents
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... Due to a highly linear signal processing, using CMOS-switching techniques instead of standard bipolar multipliers, very low distortion and very Order codes Part numbers E-TDA7437N E-TDA7437NTR December 2006 Digitally controlled audio processor low noise are obtained. Several new features like 2 C bus softmute, and zero-crossing mute are implemented ...
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... Contents 1 PIN descriptions and electrical specifications . . . . . . . . . . . . . . . . . . . . 6 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3 I2C bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.1 Data validity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.2 Start and stop conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.3 Byte format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.4 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.5 Transmission without acknowledgment . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4 Software specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.1 Interface protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.2 Auto increment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.3 Subaddress (receive mode ...
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... TDA7437N 5.14 Input selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 6 Curves of electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 7 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 3/34 ...
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... List of tables Table 1. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 2. Thermal data Table 3. Quick reference data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 5. Subaddress (receive mode Table 6. Send mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 7. Data byte specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 8. Loudness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 9. Mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 10. Volume . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 11. Speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 12. Bass treble . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 13. Input stage gain middle Table 14 ...
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... Timing diagram of I Figure 6. Acknowledge on the I Figure 7. Power on time constant vs CREF capacitor CREF = 4.7mF . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 8. Power on time constant vs CREF capacitor CREF = 10mF . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 9. Power on time constant vs CREF capacitor CREF = 22mF . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 10. SVRR vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 11. Soft mute Figure 12. Soft mute OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 13. ...
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... T Storage temperature range stg Table 2. Thermal data Symbol R Thermal resistance junction to pins Max. th j-amb Table 3. Quick reference data Symbol Supply voltage (AVDD and DVDD must be at the same potential) V Max. input signal handling CL THD Total harmonic distortion V = 1Vrms f = 1KHz S/N Signal to noise ratio ...
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... Symbol Input gain 1dB step Volume control 1dB step Treble control 2dB step Bass control 2dB step Middle control 2dB step Fader and balance control 1dB step Loudness control 1dB step Mute attenuation PIN descriptions and electrical specifications Parameter Min. Typ. ...
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... PIN descriptions and electrical specifications Figure 2. Block diagram TREBL_L IN_L 8/34 MULTIPLEXER TDA7437N PAUSE SMEXT BASS_RO) TREB_R IN_R MUXOUT_R ...
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... Maximum attenuation MAX A Step resolution coarse atten. STEPC E Attenuation set error A E Tracking error t = 10KΩ 50Ω 25°C; all gains = 0dB 1KHz. Refer to the L g amb Parameter Test condition pin and ≤ 0.3% Adjacent gain steps IMIN IMAX Input selector BIT ...
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... Electrical characteristics Table 4. Electrical characteristics (continued) Symbol V DC steps DC Loudness control (Pin 4, 12) R Internal resistor I A Maximum attenuation MAX A Step resolution step Zero crossing mute V Zero crossing threshold TH A Mute attenuation MUTE V DC step DC Soft mute A Mute attenuation MUTE T ON delay time ...
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... C Parameter Test condition -40dB V Data word = 1111XXXX -40dB V Adjacent attenuation steps d = 0.3% WIN = 11 WIN = 10 WIN = 01 WIN = 1KHz Output muted ( 20kHz flat) All gains 0dB (B = 200 to 20kHz flat -20dB -20 to -60dB V All Gains = 0dB; V 2.1Vrms Electrical characteristics Min. Typ. Max. ±13 ±14 ± ...
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... Internal pullup resistor to Vs/2; "LOW" = softmute active Note: The ANGND and DIGGND layout wires must be kept separated recommended to be put as far as possible from the device. The CLD - and CDR - can be short-circuited in applications providing 3 wires CD signal Figure 3. CLD and CDR CLD - = DIFFINLGND ...
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... Start and stop conditions As shown in Figure 5 SCL is HIGH. The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH. A STOP conditions must be sent before each START condition. 3.3 Byte format Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit ...
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... I2C bus interface Figure 4. Data validity SDA SCL Figure 5. Timing diagram of I SCL SDA Figure 6. Acknowledge on the I SCL SDA START 14/34 DATA LINE CHANGE STABLE, DATA DATA VALID ALLOWED 2 C Bus D99AU1032 START 2 C Bus MSB D99AU1033 TDA7437N D99AU1031 2 I CBUS ...
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... ACK = Acknowledge Start Stop Auto increment Not used Max clock speed 500kbits/s ADDRpin open ADDRpin close 4.2 Auto increment If bit I in the subaddress byte is set to "1", the autoincrement of the subaddress is enabled. 4.3 Subaddress (receive mode) Table 5. Subaddress (receive mode) MSB X X ...
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... Transmission can be repeated without new chipaddress. 4.5 Data byte specification Table 7. Data byte specification MSB Selected when using a 3 wire differential source (pins 5 and 13 shorted) 2. Selected when using a 4 wire differential source 3. OUTR-INR (OUTL-INR) short circuited internally (no need for external connection Table 8. Loudness MSB D7 D6 16/34 X ...
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... Loudness off Fine volume 0dB -0.25dB -0.5dB -0.75dB LSB Function Soft mute soft mute with fast slope 1 1 Soft mute with slow slope Zero mute Direct mute Reset 17/34 ...
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... TDA7437N LSB Function D1 D0 Zero cross window (280mV) Zero cross window (140mV) Zerocross window (70mV) Zerocross window (35mV) Non symmetrical bass Symmetrical bass LSB Function 0dB 0 1 -1dB 1 0 -2dB 1 1 -3dB 0 0 -4dB 0 1 -5dB 1 0 -6dB 1 1 -7dB 16dB ...
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... Software specification LSB Function D1 D0 1.25dB step 0 0 0dB 0 1 -1dB 1 0 -2dB 1 1 -3dB 0 0 -4dB 0 1 -5dB 1 0 -6dB 1 1 -7dB 0dB -8dB -16dB -24dB -32dB -40dB -48dB -56dB -64dB -72dB X X Mute LSB Function D1 D0 Treble step 0 0 -14dB ...
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... Software specification Table 12. Bass treble (continued) MSB Table 13. Input stage gain middle MSB D7 D6 20/ TDA7437N LSB Function 0dB 1 0 2dB 0 1 4dB 0 0 6dB 1 1 8dB 1 0 10dB 0 1 12dB 0 0 14dB Bass steps -14dB -12dB -10dB -8dB -6dB -4dB -2dB ...
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... TDA7437N Table 13. Input stage gain middle (continued) MSB Software specification LSB Function 4dB 0 1 5dB 1 0 6dB 1 1 7dB 0 0 8dB 0 1 9dB 1 0 10dB 1 1 11dB 0 0 12dB 0 1 13dB 1 0 14dB 1 1 15dB Middle step -14dB -12dB -10dB -8dB ...
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... In the application, the soft mute ON programming should be followed by programming of direct mute on (see 5.2), in order to achieve a final 100dB attenuation. In addition to the I bus programming, the Soft Mute ON can be generated in a fast way by forcing a LOW level at pin SMEXT (TTL Level compatible). This approach is recommended for fast RDS AF switching ...
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... On chip is implemented by a pause detector block. It uses the same 4 windows threshold selectable for the zero crossing mute, bit D6,D5 byte MUTE (see above). The detector can be put into OFF by forcing bit otherwise it is active. Pause detector information is available at the PAUSE pin. A capacitor must be connected between the PAUSE pin and ground ...
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... Pause pin level.The ON/OFF voltage threshold is 3.0V typical. Pause OFF = level low (< 3.0V) Pause ON = level high ( ; 3.0V reading via I2C bus the transmitted byte, bit pause active pause detected. The external capacitor value fixes the time constant. The pull up current is 25uV typical, with input signal Vin = 1Vrm -- ...
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... ST bit. The P bit check is useful in tuning jumps without signal muting. The SM soft mute status becomes active immediately, when bit D0 is set to 1 (soft mute ON, MUTE byte) and not when the signal level has reached the 60 dB final attenuation. 5.8 ...
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... IN_L and IN-R. In the case of an application without any external devices, the pins OUT_L/OUT_R and IN_L/IN_R can be left unconnected, if bit D3 byte input selector is forced = 0 (DC connect). Instead if bit D3 is kept = 1 an external decoupling capacitor must be provided between OUTR/INR and OUTL/INR to avoid signal DC jumps, generating " ...
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... Several bass filter types can be implemented. Normally it is the basic T-type bandpass filter that is used. Starting from the filter component values (R1 internal and R2, C1, C2 external), the centre frequency Fc, the gain Av at max bass boost and the filter Q factor are computed as follows: Vice versa fixed Fc, Av, and R1 (internal typ.± ...
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... Curves of electrical characteristics 6 Curves of electrical characteristics Figure 7. Power on time constant vs C capacitor C REF V (1V/div) OUT LF CREF BWL Figure 9. Power on time constant vs C capacitor C REF V (1V) OUT LF CREF BWL Figure 11. Soft mute ON (a) SOFT MUTE=ON SLOPE=FAST Vout=500mVrms V Main Menu Pin Csm 28/34 Figure 8 ...
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... RIGHT Return Figure 15. Pause detector PAUSE DETECTOR ZCW=140mV Cpause=100nF V Vout Main Menu CH2 4.12V DC V Vout D95AU387 SOFT MUTE Figure 14. Zero crossing mute OFF D95AU389 V x Chan 1 0.5ms 0.2V Main Menu x Chan 2 0.5ms 0.2V Multi Zoom off TIME Figure 16. Pause detector ...
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... Curves of electrical characteristics Figure 17. Symmetrical bass (dB -10 -15 10 100 1K Figure 19. Loudness ATT (dB 100 1K 30/34 Figure 18. unsymmetrical bass ATT D95AU393 (dB -10 -15 -20 -25 10K Freq(Hz) 10 D98AU887 10K Freq(Hz) TDA7437N D95AU394 100 1K 10K Freq(Hz) ...
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... TDA7437N Figure 20. Test board diagram CON1 C17 C18 22μF 100nF C19 5.6nF TRL C20 5.6nF 44 TRR 1 IN_R 2 C21 2.2μF 3 O_R C22 4.7nF CON4 4 LOUDR C23 4.7μF DIFG_R 5 DIFG_R C24 4.7μF DIFF_R 6 DIFF_R C25 470nF ST4_R 7 ST4_R C26 470nF ...
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... In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ...
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... TDA7437N 8 Revision history Table 14. Document revision history Date 24-Jan-06 01-Dec-06 Revision 1 Initial release. 2 Package changed, layout change, text modifications. Revision history Changes 33/34 ...
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