MT8952BP1 Zarlink, MT8952BP1 Datasheet - Page 17

• Manufacturer Part Number: MT8952BP1
• Description: PB FREE HDLC CONTROLLER, PLCC
• Manufacturer: Zarlink

Recommended Operating Conditions
* Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.
‡ Typical figures are at 25
‡ Typical figures are at 25
* Outputs unloaded. Input pins 12 and 25 clocked at 2048 kHz. All other inputs at V
Absolute Maximum Ratings
DC Electrical Characteristics -
V
DD
1
2
3
4
5
10
11
12
1
2
3
4
5
6
1
2
3
4
5
6
7
8
9
=5V
Supply Voltage
Input HIGH voltage
Input LOW voltage
Frequency of operation
Operating temperature
Supply voltage
Voltage on any pin (other than supply pins)
Current on any pin (other than supply pins)
DC Supply or ground current
Storage temperature
Package power dissipation
±
N
P
U
T
O
U
T
P
U
T
I
5%, V
Supply Current (Quiescent)
Supply current (Operational)
Input HIGH voltage
Input LOW voltage
Input leakage current
Input capacitance
HIGH switching point for
Schmitt Trigger (RST) input
LOW switching point for
Schmitt Trigger (RST) input
Hysteresis on Schmitt Trigger
(RST) input
Output HIGH current (on all
the outputs except IRQ)
Output LOW current (on all
the outputs including IRQ)
Output capacitance
SS
Characteristics
=0V, T
Characteristics
A
°
°
=-40 to 85
C and are for design aid only: not guaranteed and not subject to production testing.
C and are for design aid only: not guaranteed and not subject to production testing.
Parameter
°
C.
*
Voltages are with respect to ground (VSS) unless otherwise stated.
Sym
V
Plastic
V
V
f
T
CL
DD
IH
IL
A
Sym
V
I
I
I
V
V
C
V
V
I
C
I
DD
DD
OH
OL
IZ
T+
IH
IL
in
T-
H
o
- Voltages are with respect to ground (V
4.75
Min
V
-40
2.4
SS
Min
2.0
-5
5
Typ
5.0
25
Typ
0.4
4.0
1.0
0.5
-16
10
10
15
1
‡
Symbol
I
DD
I
‡
V
I
T
P
V
/ I
DD
ST
/ I
D
I
Max
5.25
V
SS
O
0.4
5.0
85
SS
DD
Max
.
1.0
0.8
10
10
Units
ISO-CMOS
MHz
Units
°C
V
V
V
V
mA
mA
mA
µA
µA
pF
pF
V
V
V
V
V
SS
Min
-0.3
-65
SS
-0.3
) unless otherwise stated.
For a Noise Margin of 400
mV
For a Noise Margin of 400
mV
When clock input is at twice
the bit rate.
Outputs unloaded and
clock input (CKi) grounded
*See below
V
V
OH
OL
=0.4 V
=2.4 V
Test Conditions
Test Conditions
V
DD
Max
±25
±50
150
7.0
0.6
MT8952B
+0.3
Units
mA
mA
°C
W
V
V
3-77