AD7243AR Analog Devices Inc, AD7243AR Datasheet - Page 2

• Manufacturer Part Number: AD7243AR
• Description: DAC 1-CH R-2R 12-Bit 16-Pin SOIC W
• Manufacturer: Analog Devices Inc
• Series: DACPORT®r

Specifications of AD7243AR

• Package: 16SOIC W
• Resolution: 12 Bit
• Conversion Rate: 300 KSPS
• Architecture: R-2R
• Digital Interface Type: Serial (3-Wire)
• Number Of Outputs Per Chip: 1
• Output Type: Voltage
• Full Scale Error: ±6 LSB
• Integral Nonlinearity Error: ±1 LSB
• Maximum Settling Time: 10 us
• Rohs Status: RoHS non-compliant
• Settling Time: 10µs
• Number Of Bits: 12
• Data Interface: Serial
• Number Of Converters: 1
• Voltage Supply Source: Dual ±
• Power Dissipation (max): 100mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)

Parameter
STATIC PERFORMANCE
REFERENCE OUTPUT
REFERENCE INPUT
DIGITAL INPUTS
DIGITAL OUTPUT
ANALOG OUTPUT
AC CHARACTERISTICS
POWER REQUIREMENTS
NOTES
1
2
3
4
5
6
Specifications subject to change without notice.
AD7243–SPECIFICATIONS
Power Supply Tolerance A, B Versions: ± 10%; S Version: ± 5%.
Temperature ranges are as follows: A, B Versions: –40°C to +85°C; S Version: –55°C to +125°C.
See terminology.
Measured with respect to REFIN and includes unipolar/bipolar offset error.
Guaranteed by design and characterization, not production tested.
0 V to +10 V output range is available only with V
Resolution
Relative Accuracy
Differential Nonlinearity
Unipolar Offset Error
Bipolar Zero Error
Full-Scale Error
Full-Scale Temperature Coefficient
Reference Output Range, REFOUT
Reference Temperature Coefficient
Reference Load Change
(∆REFOUT
Reference Input Range, REFIN
Input Current
Input High Voltage, V
Input Low Voltage, V
Input Current, I
Input Capacitance
Serial Data Out (SDO)
Output Low Voltage, V
Output High Voltage, V
Output Range Resistor, R
Output Voltage Ranges
Output Voltage Ranges
DC Output Impedance
Voltage Output Settling-Time
Digital-to-Analog Glitch Impulse
Digital Feedthrough
V
V
I
I
DD
SS
DD
SS
Positive Full-Scale Change
Negative Full-Scale Change
(Dual Supplies)
Range (Dual Supplies)
Range
VS
. I
3, 4
IN
L
3
)
5
3
3
3
INL
INH
6
6
5
OL
OH
3
5
OFS
3
5
5
A
12
± 1
± 0.9
± 4
± 5
± 6
± 5
4.95/5.05
± 25
–1
4.95/5.05
5
2.4
0.8
± 1
8
0.4
4.0
15/30
+5, +10
+5, +10, ±5 +5, +10, ± 5
0.5
10
10
30
10
+10.8/+16.5 +10.8/+16.5 +11.4/+15.75
–10.8/–16.5 –10.8/–16.5
10
2
2
DD
≥ +14.25 V.
B
12
± 1/2
± 0.9
± 4
± 5
± 6
± 5
4.95/5.05
± 25
–1
4.95/5.05
5
2.4
0.8
± 1
8
0.4
4.0
15/30
+5, +10
0.5
10
10
30
10
10
2
2
(V
R
L
DD
= 2 k , C
= +12 V to +15 V,
S
12
± 1
± 0.9
± 5
± 6
± 7
± 5
4.95/5.05
± 30
–1
4.95/5.05
5
2.4
0.8
± 1
8
0.4
4.0
15/30
+5, +10
+5, +10, ± 5
0.5
10
10
30
10
–11.4/–15.75
10
2
2
L
= 100 pF to AGND. All Specifications T
1
Unit
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
ppm of FSR/
°C typ
V min/V max
ppm/°C typ
mV max
V min/V max
µA max
V min
V max
µA max
pF max
V max
V min
kΩ min/max
V
V
Ω typ
µs max
µs max
nV secs typ
nV secs typ
V min/V max
V min/V max
mA max
mA max
V
SS
= 0 V or –12 V to –15 V,
Test Conditions/Comments
Guaranteed Monotonic
V
V
Guaranteed By Process
Guaranteed By Process
Reference Load Current (I
5 V ± 1% for Specified Performance
V
I
I
Typically 20 k . Guaranteed By Process
Single Supply; V
Dual Supply; V
Settling Time to Within ± 1/2 LSB of Final Value
Typically 4 µs
Typically 5 µs
DAC Latch Contents Toggled Between All 0s
and All 1s
LDAC = High
For Specified Performance Unless Otherwise Stated
For Specified Performance Unless Otherwise Stated
Output Unloaded; Typically 7 mA
Output Unloaded; Typically 1 mA
SINK
SOURCE
SS
SS
IN
Contents All 0s
= –12 V to –15 V
= 0 V or –12 V to –15 V
= 0 V to V
= 1.6 mA
= 400 µA
1
MIN
DD
AGND = DGND = O V, REFIN = +5 V,
SS
SS
to T
= –12 V to –15 V
= 0 V
1
; DAC Latch Contents All 0s
MAX
unless otherwise noted.)
L
) Change (0–100 µA)
1
; DAC Latch