AD7243BR Analog Devices Inc, AD7243BR Datasheet
AD7243BR
Specifications of AD7243BR
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AD7243BR Summary of contents
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GENERAL DESCRIPTION The AD7243 is a complete 12-bit, voltage output, digital-to- analog converter with output amplifier and Zener voltage refer- ence on a monolithic CMOS chip. No external trims are required to achieve full specified performance. The output amplifier ...
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AD7243–SPECIFICATIONS 2 Parameter A STATIC PERFORMANCE Resolution 12 ± Relative Accuracy ± 0.9 3 Differential Nonlinearity ± Unipolar Offset Error ± Bipolar Zero Error ± Full-Scale Error ± Full-Scale ...
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... Extended (S Version –55°C to +125°C Model Temperature Range AD7243AN –40°C to +85°C AD7243BN –40°C to +85°C AD7243AR –40°C to +85°C AD7243BR –40°C to +85°C AD7243AQ –40°C to +85°C AD7243BQ –40°C to +85°C 2 AD7243SQ –55°C to +125°C ...
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AD7243 TERMINOLOGY Bipolar Zero Error Bipolar Zero Error is the voltage measured at V DAC is configured for bipolar output and loaded with all 0s (Two’s Complement Coding) or with 1000 0000 0000 (Offset Binary Coding due to ...
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TERMINOLOGY (Continued) This “knee” offset effect, not a linearity error, and the transfer function would have followed the dotted line if the out- put voltage could have gone negative. Normally, linearity is measured between zero (all 0s input ...
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AD7243 allow full sink capability of 2.5 mA over the entire output range and to eliminate the effects of negative offsets on the transfer characteristic (outlined previously). A plot of the output sink capability of the amplifier ...
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Although 16 bits of data are clocked into the input register, only the latter 12 bits get transferred into the DAC latch. The first 4 bits in the 16 bit stream are don’t cares since their value does not affect ...
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AD7243 APPLYING THE AD7243 Power Supply Decoupling To achieve optimum performance when using the AD7243, the V and V lines should each be decoupled to DGND using DD SS 0.1 µF capacitors. In noisy environments it is recommended that 10 ...
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MICROPROCESSOR INTERFACING Microprocessor interfacing to the AD7243 is via a serial bus which uses standard protocol compatible with DSP processors and microcontrollers. The communications channel requires a three-wire interface consisting of a clock signal, a data signal and a synchronization ...
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AD7243 AD7243–87C51 Interface A serial interface between the AD7243 and the 87C51 microcontroller is shown in Figure 14. TXD of the 87C51 drives SCLK of the AD7243, while RXD drives the serial data line of the part. The SYNC signal ...
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Common clock, data, and synchronization signals are applied to all DACs in the chain. The loading sequence starts by taking SYNC low. The data is then clocked into the input registers on the falling edge of SCLK. Sixteen clock pulses ...
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AD7243 0.18 (4.57) 0.200 (5.08) MAX 0.022 (0.558) 0.014 (0.356) 16 0.300 (7.62) 0.292 (7.42) 1 0.011 (0.279) 0.004 (0.102) STANDOFF 0.050 (1.27) REF OUTLINE DIMENSIONS Dimensions shown in inches and (mm). Plastic DIP (N-16 0.25 0.31 (6.35) ...