AD9764AR Analog Devices Inc, AD9764AR Datasheet - Page 17

• Manufacturer Part Number: AD9764AR
• Description: DAC 1-CH Segment 14-Bit 28-Pin SOIC W
• Manufacturer: Analog Devices Inc
• Series: TxDAC®r

Specifications of AD9764AR

• Package: 28SOIC W
• Resolution: 14 Bit
• Conversion Rate: 125 MSPS
• Architecture: Segment
• Digital Interface Type: Parallel
• Number Of Outputs Per Chip: 1
• Output Type: Current
• Full Scale Error: ±7 %FSR
• Integral Nonlinearity Error: ±6.5 LSB
• Maximum Settling Time: 0.035(Typ) us
• Rohs Status: RoHS non-compliant
• Settling Time: 35ns
• Number Of Bits: 14
• Number Of Converters: 1
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 170mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• For Use With: AD9764-EB - BOARD EVAL FOR AD9764
• Data Interface: -

of the DAC can be evaluated. Nonlinearities associated with the
DAC will create spurious tones of which some may fall back into
the “empty” channel thus limiting a channel’s carrier-to-noise
ratio. Other spurious components falling outside the band of
interest may also be important, depending on the system’s spectral
mask and filtering requirements.
This particular test vector was centered around one-half the
Nyquist bandwidth (i.e., f
Centering the tones at a much lower region (i.e., f
would lead to an improvement in performance while centering
the tones at a higher region (i.e., f
degradation in performance. Figure 40a shows the SFDR vs.
amplitude at different sample rates up to the Nyquist frequency
while Figure 40b shows the SFDR vs. amplitude within the
passband of the test vector. In assessing a DAC’s multitone
performance, it is also recommended that several units be tested
under exactly the same conditions to determine any performance
variability.
REV. B
Figure 40b. Multitone SFDR vs. A
Passband)
Figure 40a. Multitone SFDR vs. A
80
75
70
65
60
55
50
45
40
80
75
70
65
60
55
50
45
40
35
30
–20
–20
50 MSPS
10 MSPS
–15
–15
CLOCK
100 MSPS
20 MSPS
A
A
OUT
OUT
50 MSPS
/4) with a passband of f
– dBFS
– dBFS
–10
–10
20 MSPS
CLOCK
100 MSPS
OUT
10 MSPS
/2.5) would result in a
OUT
(Within Multitone
–5
(Up to Nyquist)
–5
CLOCK
CLOCK
0
0
/10)
/16.
–17–
AD9764 EVALUATION BOARD
General Description
The AD9764-EB is an evaluation board for the AD9764 14-bit
DAC converter. Careful attention to layout and circuit design,
combined with a prototyping area, allows the user to easily and
effectively evaluate the AD9764 in any application where high
resolution, high speed conversion is required.
This board allows the user the flexibility to operate the AD9764
in various configurations. Possible output configurations include
transformer coupled, resistor terminated, inverting/noninverting
and differential amplifier outputs. The digital inputs are designed
to be driven directly from various word generators with the
onboard option to add a resistor network for proper load termi-
nation. Provisions are also made to operate the AD9764 with
either the internal or external reference or to exercise the power-
down feature.
Refer to the application note AN-420, Using the AD9760/AD9764/
AD9764-EB Evaluation Board for a thorough description and
operating instructions for the AD9764 evaluation board.
AD9764