74LVC138APW-T NXP Semiconductors, 74LVC138APW-T Datasheet - Page 4

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74LVC138APW-T

Manufacturer Part Number
74LVC138APW-T
Description
Decoder/Demultiplexer Single 3-to-8 16-Pin TSSOP T/R
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC138APW-T

Package
16TSSOP
Logic Function
Decoder/Demultiplexer
Logic Family
LVC
Number Of Element Outputs
8
Number Of Elements Per Chip
1
Number Of Input Enables Per Element
3
Demultiplexing Capability
1-of-8
Fabrication Technology
CMOS
Tolerant I/os
5 Inputs V
Typical Operating Supply Voltage
1.8|2.5|3.3 V
Operating Temperature
-40 to 125 °C
Philips Semiconductors
PINNING
2003 May 06
handbook, halfpage
3-to-8 line decoder/demultiplexer; inverting
Fig.1 Pin configuration SO16 and (T)SSOP16.
PIN
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
GND
A0
A1
A2
E1
E2
E3
Y7
1
2
3
4
5
6
7
8
138
MNA369
A0
A1
A2
E1
E2
E3
Y7
GND
Y6
Y5
Y4
Y3
Y2
Y1
Y0
V
CC
16
15
14
13
12
11
10
9
V CC
Y0
Y1
Y2
Y3
Y4
Y5
Y6
SYMBOL
address input
address input
address input
enable input (active LOW)
enable input (active LOW)
enable input (active HIGH)
output
ground (0 V)
output
output
output
output
output
output
output
supply voltage
4
handbook, halfpage
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
Fig.2 Pin configuration DHVQFN16.
A1
A2
E1
E2
E3
Y7
Top view
2
3
4
5
6
7
DESCRIPTION
GND
A0
8
1
GND
V CC
(1)
16
Y6
9
Product specification
MCE177
74LVC138A
15
14
13
12
11
10
Y0
Y1
Y2
Y3
Y4
Y5

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