M25PX64-VME6G NUMONYX, M25PX64-VME6G Datasheet - Page 17
![no-image](/images/manufacturer_photos/0/4/484/numonyx_sml.jpg)
M25PX64-VME6G
Manufacturer Part Number
M25PX64-VME6G
Description
NEW 64MB T9HX SECTOR ERASE
Manufacturer
NUMONYX
Datasheet
1.M25PX64-VME6G.pdf
(70 pages)
Specifications of M25PX64-VME6G
Cell Type
NOR
Density
64Mb
Access Time (max)
8ns
Interface Type
Serial (SPI)
Boot Type
Not Required
Address Bus
24b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
VDFPN
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
8M
Supply Current
12mA
Mounting
Surface Mount
Pin Count
8
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M25PX64-VME6G
Manufacturer:
NEC
Quantity:
100
Part Number:
M25PX64-VME6G
Manufacturer:
ST
Quantity:
20 000
Table 3.
1. The device is ready to accept a bulk erase instruction if, and only if, all block protect (BP2, BP1, BP0) are 0.
Status register contents
TB
bit
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
bit 2
BP
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Protected area sizes
bit 1
As a second level of protection, the Write Protect signal (applied on the W/V
freeze the status register in a read-only mode. In this mode, the block protect bits (BP2,
BP1, BP0) and the status register write disable bit (SRWD) are protected. For more details,
see
BP
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Section 6.5: Write status register
bit 0
BP
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
none
Upper 64th (2 sectors: 126 and 127)
Upper 32nd (4 sectors: 124 to 127)
Upper 16th (8 sectors: 120 to 127)
Upper 8th (16 sectors: 56 to 63)
Upper quarter (32 sectors: 96 to 127)
Upper half (64 sectors: 64 to 127)
All sectors (128 sectors: 0 to 127)
none
Lower 64th (2 sectors: 0 to1)
Lower 32nd (4 sectors: 0 to 3)
Lower 16th (8 sectors: 0 to 7)
Lower 8th (16 sectors: 0 to15)
Lower 4th (32 sectors: 0 to 31)
Lower half (64 sectors: 0 to 63)
All sectors (128 sectors: 0 to 127)
Protected area
(WRSR).
Memory content
All sectors
Lower 63/64ths (126 sectors: 0 to 125)
Lower 31/32nds (124 sectors: 0 to 123)
Lower 15/16ths (120 sectors: 0 to 119)
Lower 7/8ths (112 sectors: 0 to 111)
Lower three-quarters (96 sectors: 0 to 95)
Lower half (64 sectors: 0 to 63)
none
All sectors
Upper 63/64ths (126 sectors: 2 to 127)
Upper 31/32nds (124 sectors: 4 to 127)
Upper 15/16ths (120 sectors: 8 to 127)
Upper 7/8ths (112 sectors: 16 to 127)
Upper 3/4ths (96 sectors: 32 to 127)
Upper half (64 sectors: 64 to 127)
none
(1)
(1)
Unprotected area
(128 sectors: 0 to 127)
(128 sectors: 0 to 128)
PP
pin) can
17/70