XC2C256-6VQG100C Xilinx Inc, XC2C256-6VQG100C Datasheet - Page 6
![CPLD CoolRunner™-II Family 6K Gates 256 Macro Cells 256MHz 0.18um (CMOS) Technology 1.8V 100-Pin VTQFP](/photos/6/70/67082/100-tqfp_sml.jpg)
XC2C256-6VQG100C
Manufacturer Part Number
XC2C256-6VQG100C
Description
CPLD CoolRunner™-II Family 6K Gates 256 Macro Cells 256MHz 0.18um (CMOS) Technology 1.8V 100-Pin VTQFP
Manufacturer
Xilinx Inc
Series
CoolRunner IIr
Specifications of XC2C256-6VQG100C
Package
100VTQFP
Family Name
CoolRunnerÂ-II
Device System Gates
6000
Number Of Macro Cells
256
Maximum Propagation Delay Time
6 ns
Number Of User I/os
80
Number Of Logic Blocks/elements
16
Typical Operating Supply Voltage
1.8 V
Maximum Operating Frequency
256 MHz
Number Of Product Terms Per Macro
40
Operating Temperature
0 to 70 °C
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
5.7ns
Voltage Supply - Internal
1.7 V ~ 1.9 V
Number Of Logic Elements/blocks
16
Number Of Macrocells
256
Number Of Gates
6000
Number Of I /o
80
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Features
Programmable
Voltage
1.8V
Memory Type
CMOS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
122-1573 - KIT STARTER COOLRUNNER-II LP/LC122-1512 - KIT DESIGN CPLD W/BATT HOLDER
Number Of Logic Elements/cells
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC2C256-6VQG100C
Manufacturer:
XILINX
Quantity:
670
XC2C256 CoolRunner-II CPLD
SSTL3-1 DC Voltage Specifications
HSTL1 DC Voltage Specifications
AC Electrical Characteristics Over Recommended Operating Conditions
6
Notes:
1.
2.
Notes:
1.
2.
T
T
T
T
T
T
T
T
F
F
F
F
F
T
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Symbol
Symbol
PD1
PD2
SUD
SU1
SU2
HD
H
CO
TOGGLE
SYSTEM1
SYSTEM2
EXT1
EXT2
PSUD
CCIO
REF
TT
IH
IL
OH
OL
CCIO
REF
TT
IH
IL
OH
OL
V
V
V
V
Symbol
(2)
(2)
REF
TT
REF
TT
(1)
(1)
(3)
(3)
of transmitting device must track V
of transmitting device must track V
should track the variations in V
should track the variations in V
(1)
(2)
(2)
Input source voltage
Input reference voltage
Termination voltage
High level input voltage
Low level input voltage
High level output voltage
Low level output voltage
Input source voltage
Input reference voltage
Termination voltage
High level input voltage
Low level input voltage
High level output voltage
Low level output voltage
Propagation delay single p-term
Propagation delay OR array
Direct input register clock setup time
Setup time (single p-term)
Setup time (OR array)
Direct input register hold time
P-term hold time
Clock to output
Internal toggle rate
Maximum system frequency
Maximum system frequency
Maximum external frequency
Maximum external frequency
Direct input register p-term clock setup time
Parameter
Parameter
CCIO
CCIO
REF
REF
, also peak to peak AC noise on V
, also peak-to-peak AC noise on V
I
I
OH
I
OH
I
OL
of receiving devices
of receiving devices
Parameter
OL
= –8 mA, V
Test Conditions
= –8 mA, V
= 8 mA, V
= 8 mA, V
Test Conditions
www.xilinx.com
-
-
-
-
-
-
-
-
-
-
CCIO
CCIO
CCIO
CCIO
= 1.7V
= 3V
= 1.7V
= 3V
V
V
V
V
REF
REF
V
CCIO
CCIO
REF
REF
REF
Min.
0.68
–0.3
Min.
1.4
–0.3
may not exceed ± 2% V
may not exceed ± 2% V
3.0
1.3
-
-
+ 0.1
– 0.05
-
– 0.4
+ 0.2
– 1.1
Min.
2.6
2.4
2.7
1.3
0
0
-
-
-
-
-
-
-
-
V
CCIO
-6
0.75
Typ
Typ
1.5
3.3
1.5
1.5
Max.
450
256
238
145
139
-
-
-
-
-
-
-
-
5.7
6.0
4.5
x 0.5
-
-
-
-
-
-
DS094 (v3.2) March 8, 2007
REF
REF
Min.
V
V
3.0
2.8
3.3
1.7
V
Product Specification
0
0
V
REF
-
-
-
-
-
-
-
-
CCIO
REF
REF
Max.
Max.
3.6
1.7
0.7
-7
0.90
1.6
1.9
0.4
+ 0.05
-
– 0.2
-
-
+ 0.3
– 0.1
Max.
300
152
141
108
114
6.7
7.5
6.0
-
-
-
-
-
-
Units
Units
Units
MHz
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
V
V
V
V
V
V
V
V
V
V
V
V
V
R