XC2S300E-6FTG256C Xilinx Inc, XC2S300E-6FTG256C Datasheet - Page 101

• Manufacturer Part Number: XC2S300E-6FTG256C
• Description: FPGA Spartan®-IIE Family 300K Gates 6912 Cells 357MHz 0.15um Technology 1.8V 256-Pin FTBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-IIEr

Specifications of XC2S300E-6FTG256C

• Package: 256FTBGA
• Family Name: Spartan®-IIE
• Device Logic Cells: 6912
• Device Logic Units: 1536
• Device System Gates: 300000
• Maximum Internal Frequency: 357 MHz
• Typical Operating Supply Voltage: 1.8 V
• Maximum Number Of User I/os: 182
• Ram Bits: 65536
• Number Of Logic Elements/cells: 6912
• Number Of Labs/clbs: 1536
• Total Ram Bits: 65536
• Number Of I /o: 182
• Number Of Gates: 300000
• Voltage - Supply: 1.71 V ~ 1.89 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1325

FG676 Pinouts (XC2S400E, XC2S600E) (Continued)
DS077-4 (2.3) June 18, 2008
Product Specification
I/O, L64N_YY
I/O (D2), L64P_YY
I/O (D1)
I/O, VREF Bank 2,
L63N_YY
I/O, L63P_YY
I/O, L62N_YY
I/O, L62P_YY
I/O
I/O, L61N
I/O, L61P
I/O, L60N
I/O, L60P
I/O
I/O, L59N_YY
I/O, L59P_YY
I/O
I/O, L58N_YY
I/O, VREF Bank 2,
L58P_YY
I/O
I/O, L57N_YY
I/O, L57P_YY
I/O, L56N
I/O, L56P
I/O
I/O, L55N
I/O, VREF Bank 2,
L55P
I/O, L54N
I/O, L54P
I/O, L53N_YY
I/O, L53P_YY
I/O, L52N
I/O, L52P
Function
Pad Name
R
Bank
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
H22
H26
H25
H21
H20
G26
G25
G24
G23
G22
G21
G20
E26
E25
E23
E22
E21
D26
D25
F26
F25
F24
F23
F22
F21
Pin
J25
J24
J23
J22
J21
J20
J19
Output Option
LVDS Async.
XC2S600E
XC2S600E
XC2S400E
XC2S400E
XC2S600E
XC2S600E
XC2S600E
XC2S600E
XC2S400E
XC2S400E
XC2S600E
XC2S600E
All
All
All
All
All
All
All
All
All
All
All
All
All
All
-
-
-
-
-
-
www.xilinx.com
XC2S600E
Option
VREF
All
All
All
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
I/O (D2), L64P_YY
I/O, VREF Bank 2,
I/O, VREF Bank 2,
I/O, VREF Bank 2,
I/O, L64N_YY
I/O, L62N_YY
I/O, L59N_YY
I/O, L58N_YY
I/O, L57N_YY
I/O, L53N_YY
I/O, L63P_YY
I/O, L62P_YY
I/O, L59P_YY
I/O, L57P_YY
I/O, L53P_YY
I/O, L60N_Y
I/O, L60P_Y
I/O, L54N_Y
I/O, L54P_Y
Spartan-IIE FPGA Family: Pinout Tables
XC2S400E
L63N_YY
L58P_YY
I/O, L56N
I/O, L56P
I/O, L55N
I/O (D1)
L55P
I/O
I/O
I/O
I/O
I/O
Device-Specific Pinouts
-
-
-
-
I/O (D2), L64P_YY
I/O, VREF Bank 2,
I/O, VREF Bank 2,
I/O, VREF Bank 2,
I/O, VREF Bank 2,
I/O, L64N_YY
I/O, L62N_YY
I/O, L59N_YY
I/O, L58N_YY
I/O, L57N_YY
I/O, L53N_YY
I/O, L63P_YY
I/O, L62P_YY
I/O, L59P_YY
I/O, L57P_YY
I/O, L53P_YY
I/O, L61N_Y
I/O, L56N_Y
I/O, L56P_Y
I/O, L55N_Y
I/O, L52N_Y
I/O, L52P_Y
XC2S600E
L63N_YY
I/O, L60N
I/O, L60P
L58P_YY
I/O, L54N
I/O, L54P
I/O (D1)
L61P_Y
L55P_Y
I/O
I/O
I/O
I/O
I/O
101