XC3S1200E-4FG400I Xilinx Inc, XC3S1200E-4FG400I Datasheet - Page 43
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XC3S1200E-4FG400I
Manufacturer Part Number
XC3S1200E-4FG400I
Description
FPGA Spartan®-3E Family 1.2M Gates 19512 Cells 572MHz 90nm (CMOS) Technology 1.2V 400-Pin FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet
1.XC3S100E-4VQG100C.pdf
(233 pages)
Specifications of XC3S1200E-4FG400I
Package
400FBGA
Family Name
Spartan®-3E
Device Logic Cells
19512
Device Logic Units
2168
Device System Gates
1200000
Number Of Registers
17344
Maximum Internal Frequency
572 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
304
Ram Bits
516096
Number Of Logic Elements/cells
19512
Number Of Labs/clbs
2168
Total Ram Bits
516096
Number Of I /o
304
Number Of Gates
1200000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
400-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Setting the WRITE_MODE attribute to a value of
NO_CHANGE, puts the DO outputs in a latched state when
asserting WE. Under this condition, the DO outputs retain
DS312-2 (v3.8) August 26, 2009
Product Specification
R
Figure 35: Waveforms of Block RAM Data Operations with NO_CHANGE Selected
ADDR
Data_in
CLK
WE
DO
EN
DI
DISABLED
0000
DI
Internal
Memory
XXXX
aa
READ
MEM(aa)
www.xilinx.com
DO
bb
MEM(bb)=1111
1111
WRITE
the data driven just before WE is asserted. NO_CHANGE
timing is shown in the portion of
is High.
No change during write
2222
cc
MEM(cc)=2222
WRITE
dd
DS312-2_07_020905
XXXX
READ
MEM(dd)
Figure 35
Functional Description
during which WE
43
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