XC3S1600E-5FGG400C Xilinx Inc, XC3S1600E-5FGG400C Datasheet - Page 225
![FPGA Spartan®-3E Family 1.6M Gates 33192 Cells 657MHz 90nm (CMOS) Technology 1.2V 400-Pin FBGA](/photos/6/72/67298/pk083-400_sml.jpg)
XC3S1600E-5FGG400C
Manufacturer Part Number
XC3S1600E-5FGG400C
Description
FPGA Spartan®-3E Family 1.6M Gates 33192 Cells 657MHz 90nm (CMOS) Technology 1.2V 400-Pin FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet
1.XC3S100E-4VQG100C.pdf
(233 pages)
Specifications of XC3S1600E-5FGG400C
Package
400FBGA
Family Name
Spartan®-3E
Device Logic Cells
33192
Device Logic Units
3688
Device System Gates
1600000
Number Of Registers
29504
Maximum Internal Frequency
657 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
304
Ram Bits
663552
Number Of Logic Elements/cells
33192
Number Of Labs/clbs
3688
Total Ram Bits
663552
Number Of I /o
304
Number Of Gates
1600000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
400-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
HW-XA3S1600E-UNI-G - KIT DEVELOPMENT AUTOMOTIVE ECU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Price
Company:
Part Number:
XC3S1600E-5FGG400C
Manufacturer:
XILINX
Quantity:
259
Company:
Part Number:
XC3S1600E-5FGG400C
Manufacturer:
Xilinx Inc
Quantity:
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Part Number:
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Manufacturer:
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Quantity:
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Table 154: FG484 Package Pinout (Continued)
DS312-4 (v3.8) August 26, 2009
Product Specification
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
IO_L40N_0/HSWAP
IO_L40P_0
IP
IP
IP_L02N_0
IP_L02P_0
IP_L05N_0
IP_L05P_0
IP_L08N_0
IP_L08P_0
IP_L14N_0
IP_L14P_0
IP_L17N_0
IP_L17P_0
IP_L20N_0/GCLK9
IP_L20P_0/GCLK8
IP_L23N_0
IP_L23P_0
IP_L26N_0
IP_L26P_0
IP_L31N_0
IP_L31P_0
IP_L34N_0
IP_L34P_0
IP_L37N_0
IP_L37P_0
VCCO_0
VCCO_0
VCCO_0
VCCO_0
VCCO_0
VCCO_0
VCCO_0
IO_L01N_1/A15
IO_L01P_1/A16
IO_L02N_1/A13
IO_L02P_1/A14
IO_L03N_1/VREF_1
IO_L03P_1
IO_L04N_1
IO_L04P_1
R
XC3S1600E
Pin Name
FG484
AA22
W21
W20
G10
G11
Ball
B19
D17
D18
C17
B17
E15
D15
D13
C13
A12
A13
H11
H12
F10
F11
B10
B14
B18
F14
Y22
Y21
V20
U19
V19
G9
D4
C4
E6
C8
D8
C7
C6
A3
A2
B5
E8
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
GCLK
GCLK
DUAL
DUAL
DUAL
DUAL
DUAL
VREF
Type
I/O
I/O
I/O
I/O
www.xilinx.com
Table 154: FG484 Package Pinout (Continued)
Bank
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
IO_L05N_1
IO_L05P_1
IO_L06N_1
IO_L06P_1
IO_L07N_1/VREF_1
IO_L07P_1
IO_L08N_1
IO_L08P_1
IO_L09N_1
IO_L09P_1
IO_L10N_1
IO_L10P_1
IO_L11N_1
IO_L11P_1
IO_L12N_1/VREF_1
IO_L12P_1
IO_L13N_1
IO_L13P_1
IO_L14N_1
IO_L14P_1
IO_L15N_1
IO_L15P_1
IO_L16N_1/A11
IO_L16P_1/A12
IO_L17N_1/VREF_1
IO_L17P_1
IO_L18N_1/A9/RHCLK1
IO_L18P_1/A10/RHCLK0
IO_L19N_1/A7/RHCLK3/
TRDY1
IO_L19P_1/A8/RHCLK2
IO_L20N_1/A5/RHCLK5
IO_L20P_1/A6/RHCLK4/
IRDY1
IO_L21N_1/A3/RHCLK7
IO_L21P_1/A4/RHCLK6
IO_L22N_1/A1
XC3S1600E
Pin Name
Pinout Descriptions
FG484
W22
M20
M22
M16
M15
Ball
V22
U20
U21
U22
R19
R18
R16
R21
R20
P18
P17
P22
R22
P15
P16
N18
N19
N16
N17
N20
N22
K22
T19
T18
T22
T16
L21
L20
L19
L18
RHCLK/
RHCLK/
RHCLK/
RHCLK/
RHCLK/
RHCLK/
RHCLK/
RHCLK/
VREF
VREF
DUAL
DUAL
VREF
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
225
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