XC3S500E-4PQ208C Xilinx Inc, XC3S500E-4PQ208C Datasheet - Page 140

• Manufacturer Part Number: XC3S500E-4PQ208C
• Description: FPGA Spartan®-3E Family 500K Gates 10476 Cells 572MHz 90nm (CMOS) Technology 1.2V 208-Pin PQFP
• Manufacturer: Xilinx Inc

Specifications of XC3S500E-4PQ208C

• Package: 208PQFP
• Family Name: Spartan®-3E
• Device Logic Cells: 10476
• Device Logic Units: 1164
• Device System Gates: 500000
• Number Of Registers: 9312
• Maximum Internal Frequency: 572 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 158
• Ram Bits: 368640

DC and Switching Characteristics
Clock Buffer/Multiplexer Switching Characteristics
Table 101: Clock Distribution Switching Characteristics
140
Global clock buffer (BUFG, BUFGMUX, BUFGCE) I input to O-output delay
Global clock multiplexer (BUFGMUX) select S-input setup to I0 and I1
inputs. Same as BUFGCE enable CE-input
Frequency of signals distributed on global buffers (all sides)
Description
www.xilinx.com
Symbol
F
T
T
BUFG
GIO
GSI
1.46
0.55
333
Speed Grade
-5
DS312-3 (v3.8) August 26, 2009
Maximum
Product Specification
1.46
0.63
311
-4
Units
MHz
ns
ns
R