XC5VLX30T-1FF665C Xilinx Inc, XC5VLX30T-1FF665C Datasheet - Page 81

• Manufacturer Part Number: XC5VLX30T-1FF665C
• Description: FPGA Virtex®-5 Family 30720 Cells 65nm (CMOS) Technology 1V 665-Pin FCBGA
• Manufacturer: Xilinx Inc

Specifications of XC5VLX30T-1FF665C

• Package: 665FCBGA
• Family Name: Virtex®-5
• Device Logic Units: 30720
• Typical Operating Supply Voltage: 1 V
• Maximum Number Of User I/os: 360
• Ram Bits: 1327104

Table 97: Global Clock Setup and Hold With DCM and PLL in Source-Synchronous Mode
DS202 (v5.3) May 5, 2010
Product Specification
Example Data Input Setup and Hold Times Relative to a Forwarded Clock Input Pin,
situations where clock and data inputs conform to different standards, adjust the setup and hold values accordingly using the values
shown in
T
T
PSDCMPLL_0
PHDCMPLL_0
Symbol
IOB Switching Characteristics, page
/
No Delay Global Clock and IFF
PLL in Source-Synchronous Mode
Description
32.
(2)
with DCM and
www.xilinx.com
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
XC5VLX20T
XC5VLX30
XC5VLX30T
XC5VLX50
XC5VLX50T
XC5VLX85
XC5VLX85T
XC5VLX110
XC5VLX110T
XC5VLX155
XC5VLX155T
XC5VLX220
XC5VLX220T
XC5VLX330
XC5VLX330T
XC5VSX35T
XC5VSX50T
XC5VSX95T
XC5VSX240T
Device
(1)
Using DCM, PLL, and Global Clock Buffer. For
0.45
0.54
0.45
0.54
0.43
0.56
0.43
0.56
0.40
0.68
0.39
0.68
0.38
0.74
0.38
0.74
0.24
1.00
0.24
1.00
0.44
0.72
0.41
0.74
N/A
N/A
N/A
N/A
N/A
N/A
N/A
- 3
Speed Grade
0.32
0.56
0.46
0.54
0.46
0.54
0.44
0.56
0.44
0.56
0.42
0.68
0.42
0.68
0.41
0.74
0.41
0.74
0.29
1.00
0.29
1.00
0.36
1.23
0.36
1.23
0.34
1.40
0.36
1.40
0.46
0.72
0.43
0.74
0.41
0.98
0.35
1.47
- 2
0.33
0.63
0.46
0.57
0.46
0.57
0.44
0.59
0.44
0.59
0.42
0.71
0.42
0.71
0.41
0.78
0.41
0.78
0.33
1.04
0.33
1.04
0.38
1.27
0.38
1.27
0.37
1.46
0.38
1.46
0.46
0.75
0.43
0.77
0.41
1.02
0.38
1.53
- 1
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
81