XC6SLX100-2FGG484C Xilinx Inc, XC6SLX100-2FGG484C Datasheet - Page 57

FPGA Spartan®-6 Family 101261 Cells 45nm (CMOS) Technology 1.2V 484-Pin FBGA

XC6SLX100-2FGG484C

Manufacturer Part Number
XC6SLX100-2FGG484C
Description
FPGA Spartan®-6 Family 101261 Cells 45nm (CMOS) Technology 1.2V 484-Pin FBGA
Manufacturer
Xilinx Inc
Series
Spartan® 6 LXr

Specifications of XC6SLX100-2FGG484C

Package
484FBGA
Family Name
Spartan®-6
Device Logic Cells
101261
Device Logic Units
63288
Number Of Registers
126576
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
326
Ram Bits
4939776
Number Of Logic Elements/cells
101261
Number Of Labs/clbs
7911
Total Ram Bits
4939776
Number Of I /o
326
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-BBGA
No. Of Logic Blocks
15822
No. Of Macrocells
101261
Family Type
Spartan-6
No. Of Speed Grades
2
No. Of I/o's
326
Clock Management
DCM, PLL
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC6SLX100-2FGG484C
Manufacturer:
ST
Quantity:
4 450
Part Number:
XC6SLX100-2FGG484C
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC6SLX100-2FGG484C
Manufacturer:
XILINX
0
Part Number:
XC6SLX100-2FGG484C
0
Spartan-6 Device Pin-to-Pin Output Parameter Guidelines
All devices are 100% functionally tested. The representative values for typical pin locations and normal clock loading are
listed in
Table 61: Global Clock Input to Output Delay Without DCM or PLL
DS162 (v2.0) March 31, 2011
Preliminary Product Specification
Notes:
1.
LVCMOS25 Global Clock Input to Output Delay using Output Flip-Flop, 12mA, Fast Slew Rate, without DCM or PLL
T
ICKOF
Listed above are representative values where one global clock input drives one vertical clock line in each accessible column, and where all accessible
IOB and CLB flip-flops are clocked by the global clock net.
Symbol
Table 61
through
Global Clock and OUTFF without DCM or PLL
Table
67. Values are expressed in nanoseconds unless otherwise noted.
Description
www.xilinx.com
Spartan-6 FPGA Data Sheet: DC and Switching Characteristics
XC6SLX4
XC6SLX9
XC6SLX16
XC6SLX25
XC6SLX25T
XC6SLX45
XC6SLX45T
XC6SLX75
XC6SLX75T
XC6SLX100
XC6SLX100T
XC6SLX150
XC6SLX150T
Device
6.12
6.12
5.98
6.20
6.20
6.37
6.37
6.39
6.39
6.59
6.59
6.98
6.98
-3
6.99
7.18
7.68
6.51
6.42
6.69
6.69
6.88
6.88
6.99
7.18
7.68
Speed Grade
-3N
N/A
7.68
7.68
7.48
7.84
7.84
8.10
8.10
8.16
8.16
8.41
8.41
8.80
8.80
-2
10.08
10.31
10.62
9.41
9.41
9.10
9.44
9.61
N/A
N/A
N/A
N/A
N/A
-1L
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
57

Related parts for XC6SLX100-2FGG484C