4307-52 Peregrine Semiconductor, 4307-52 Datasheet - Page 8
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4307-52
Manufacturer Part Number
4307-52
Description
IC DSA 5BIT 50 OHM 20-QFN
Manufacturer
Peregrine Semiconductor
Series
UltraCMOS™r
Datasheet
1.4307-52.pdf
(11 pages)
Specifications of 4307-52
Attenuation Value
15.5dB
Tolerance
±0.15dB
Frequency Range
0 ~ 2GHz
Impedance
75 Ohm
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
1046-1034-2
Figure 18. Serial Interface Timing Diagram
Figure 19. Parallel Interface Timing Diagram
Table 8. Serial Interface AC Characteristics
V
Note:
©2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Page 8 of 11
Parallel Data
DD
Symbol
Clock
Data
C8:C0.5
LE
= 3.0 V, -40° C < T
f
t
t
t
t
t
t
Clk
ClkH
ClkL
LESUP
LEPW
SDSUP
SDHLD
f
programming sections of the functional pattern are clocked
at 10 MHz to verify fclk specification.
Clk
is verified during the functional pattern test. Serial
MSB
LE
Serial data clock
frequency (Note 1)
Serial clock HIGH time
Serial clock LOW time
LE set-up time after last
clock falling edge
LE minimum pulse width
Serial data set-up time
before clock rising edge
Serial data hold time
after clock falling edge
t
SDSUP
Parameter
t
t
SDHLD
A
PDSUP
< 85° C, unless otherwise specified
t
LEPW
Min
30
30
10
30
10
10
Max
10
t
PDHLD
LSB
t
LESUP
Unit
MHz
ns
ns
ns
ns
ns
ns
t
LEPW
Table 7. 5-Bit Attenuator Serial Programming
Register Map
MSB (first in)
Note: The start bit (B5) must always be low to prevent an unknown
state in the device .
Table 9. Parallel Interface AC Characteristics
V
DD
Symbol
= 3.0 V, -40° C < T
B5
t
t
t
↑
0
LEPW
PDSUP
PDHLD
Document No. 70-0161-04 │ UltraCMOS™ RFIC Solutions
LE minimum pulse width
Data set-up time before
rising edge of LE
Data hold time after
falling edge of LE
B4
C8
Parameter
A
< 85° C, unless otherwise specified
B3
C4
B2
C2
Min
10
10
10
Product Specification
B1
C1
Max
--
--
--
LSB (last in
PE4307
C0.5
B0
Unit
↑
ns
ns
ns