PE43703MLI-Z Peregrine Semiconductor, PE43703MLI-Z Datasheet
PE43703MLI-Z
Specifications of PE43703MLI-Z
Available stocks
Related parts for PE43703MLI-Z
PE43703MLI-Z Summary of contents
Page 1
... Vss Features due to on-board DD (optional) A2 P/S Vss EXT ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. Product Specification PE43703 option EXT HaRP™-enhanced UltraCMOS™ device Attenuation options: 0.25 dB, 0.5 dB, or 1.0 dB steps to 31.75 dB 0.25 dB monotonicity for ≤ 4.0 GHz 0.5 dB monotonicity for ≤ 5.0 GHz 1 dB monotonicity for ≤ ...
Page 2
... Frequency (MHz) ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page Test Conditions Frequency 9 kHz ≤ 4 GHz 9 kHz < 3 GHz 9 kHz < 3 GHz 3 GHz < 4 GHz 9 kHz - 4 GHz 9 kHz - 4 GHz 20 MHz - 4 GHz 20 MHz - 4 GHz 1 MHz ...
Page 3
... Figure 10. 0.5 dB Attenuation Error 4dB State 1.5 1.0 0.5 0.0 -0.5 -1.0 -1.5 4000 5000 ©2008-2009 Peregrine Semiconductor Corp. All rights reserved 5.0 V, Vss = -2 GND EXT Min Typical Max 9 kHz 5000 MHz 0 – 31.5 2.0 ±(0.25+4.5%) ±(0.3+5%) ±(1.3+0%) ...
Page 4
... Frequency (MHz) ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page Test Conditions Frequency 9 kHz ≤ 6 GHz 9 kHz – 4 GHz 4 GHz ≤ 6 GHz 4 GHz ≤ 6 GHz 4 GHz ≤ 6 GHz 9 kHz - 6 GHz 9 kHz - 6 GHz ...
Page 5
... Figure 20. Output Return Loss @ Temperature 85C 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 - ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. -40C +25C 0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 Frequency (GHz) 0dB 0.25dB 0.5dB 4dB 8dB 16dB Fre quency (GHz) for 16 dB State ...
Page 6
... Attenuation Setting (dB) Figure 25. Attenuation Error @ 3000 MHz +25C -40C 1.5 1.0 0.5 0.0 -0.5 -1.0 -1 Attenuation Setting (dB) ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page Figure 22. Relative Phase Error vs. 1dB 2dB 31.75dB 35.00 30.00 25.00 20.00 15.00 10.00 5.00 0. Figure 24. Attenuation Error @ 1800 MHz +85C -0 ...
Page 7
... The Moisture Sensitivity Level rating for the PE43703 in the 5x5 QFN package is MSL1. Exposed Solder Pad Connection The exposed solder pad on the bottom of the package must be grounded for proper device operation. ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. ) Vss EXT control must be ...
Page 8
... Vss supply Figure 28. Maximum Power Handling Capability: Z 30.0 25.0 20.0 15.0 10.0 5.0 0.0 1.0E+03 1.0E+04 1.0E+05 1.0E+06 ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page Table 6. Absolute Maximum Ratings Max Units Symbol V 3.3 3 5.0 5.5 ...
Page 9
... Table 10. Serial Address Word Truth Table A7 (MSB Function Table 11. Serial Attenuation Word Truth Table Attenuation Setting RF1-RF2 L L Reference 31.75 dB Bits can either be set to logic high or logic low D7 must be set to logic low Q10 ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. Address Word ...
Page 10
... The serial-addressable interface is controlled using three CMOS-compatible signals: Serial-In (SI), Clock (CLK), and Latch Enable (LE). The SI and CLK inputs allow data to be serially entered into the ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page shift register. Serial data is clocked in LSB first, beginning with the Attenuation Word. ...
Page 11
... Parallel data hold time DIH Parallel/Serial setup time PSSU T Parallel/Serial hold time PSIH Digital register delay T PD (internal) Digital register delay T DIPD (internal, direct mode only) ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. T DIH T AIH T PSIH T LESU T LEPW T PD VALID Min ...
Page 12
... LE from and back latch the DD programming word into the DSA. LE must be logic low prior to programming the next word. ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page Figure 31. Evaluation Board Layout Peregrine Specification 101-0312 Note: Reference Fig. 32 for Evaluation Board Schematic Serial-Addressable Programming Procedure Position the Parallel/Serial ( P̅ ...
Page 13
... PE43703 Product Specification Figure 32. Evaluation Board Schematic Peregrine Specification 102-0381 Figure 33. Package Drawing QFN 5x5 mm MAX A NOM MIN Document No. 70-0245-05 │ www.psemi.com Note: Capacitors C1-C8, C13, & C14 may be omitted. 0.900 0.850 0.800 ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page ...
Page 14
... Figure 34. Tape and Reel Drawing Figure 35. Marking Specifications 43703 YYWW ZZZZZ Table 15. Ordering Information Order Code Part Marking PE43703MLI 43703 PE43703MLI-Z 43703 PE43703 G – 32QFN 5x5mm-3000C EK43703-01 43703 ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page Tape Feed Direction YYWW = Date Code ...
Page 15
... Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS, HaRP, MultiSwitch and DuNE are trademarks of Peregrine Semiconductor Corp. ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page ...