MAX2769ETI+T Maxim Integrated Products, MAX2769ETI+T Datasheet - Page 16

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MAX2769ETI+T

Manufacturer Part Number
MAX2769ETI+T
Description
RF Receiver Low-Power GPS and GL ONASS Receiver with
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX2769ETI+T

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Universal GPS Receiver
16
Table 5. Default Register Setting
Table 4. Serial-Interface Timing Requirements
REGISTER
PLLCONF
SYMBOL
CONF1
CONF2
CONF3
NAME
TEST1
TEST2
______________________________________________________________________________________
STRM
FDIV
CLK
t
t
t
DIV
t
t
CSH
CSW
CSS
t
t
DH
CH
DS
CL
Falling edge of CS to rising edge of the first SCLK time.
Data to serial-clock setup time.
Data to clock hold time.
Serial clock pulse-width high.
Clock pulse-width low.
Last SCLK rising edge to rising edge of CS.
CS high pulse width.
ADDRESS
(A3:A0)
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
Configures RX and IF sections, bias settings for individual blocks.
Configures AGC and output sections.
Configures support and test functions for IF filter and AGC.
PLL, VCO, and CLK settings.
PLL main and reference division ratios, other controls.
PLL fractional division ratio, other controls.
DSP interface number of frames to stream.
Fractional clock-divider values.
Reserved for test mode.
Reserved for test mode.
PARAMETER
DATA
TYP VALUE
10
10
10
25
25
10
1
DEFAULT
EAFF1DC
(D27:D0)
A2919A3
9EC0008
0C00080
10061B2
14C0402
0550288
8000070
8000000
1E0F401
UNITS
clock
ns
ns
ns
ns
ns
ns

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