PI6C2509-133LEX Pericom Semiconductor, PI6C2509-133LEX Datasheet

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PI6C2509-133LEX

Manufacturer Part Number
PI6C2509-133LEX
Description
Phase Locked Loops (PLL) Zero Delay Clck Drvr
Manufacturer
Pericom Semiconductor
Type
Zero Delay PLL Clock Driverr
Datasheet

Specifications of PI6C2509-133LEX

Number Of Circuits
1
Maximum Input Frequency
150 MHz
Minimum Input Frequency
25 MHz
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Package / Case
TSSOP-24
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
Features
• Operating Frequency up to 150 MHz
• Low-Noise Phase-Locked Loop Clock Distribution to meet
• Allows Clock Input to have Spread Spectrum modulation
• Zero input-to-output delay: Distribute One Clock Input to
• Low jitter: cycle-to-cycle jitter ±75ps max.
• 30-ohm on-chip series damping resistor at clock output drivers
• Operates at 3.3V V
• Package (Pb-free and Green available):
Logic Block Diagram
133 MHz Registered DIMM Synchronous DRAM module
specifications for server/workstation/PC applications
for EMI reduction
one bank of five and one bank of four outputs, with
separate output enables
for low noise and EMI reduction
- 24-pin TSSOP (L)
CLK_IN
FB_IN
AV CC
09-0006
1G
2G
CC
PLL
5
4
1Y[0:4]
2Y[0:3]
FB_OUT
1
Description
The PI6C2509-133 is a “quiet,” low-skew, low-jitter, phase-locked
loop (PLL) clock driver, distributing low-noise clock signals for
SDRAM and server applications. By connecting the feedback
FB_OUT output to the feedback FB_IN input, the propagation
delay from the CLK_IN input to any clock output will be nearly zero.
This zero-delay feature allows the CLK_IN input clock to be
distributed, providing 5 clocks for the first bank, and an additional
4 clocks for the second bank.
This clock driver is designed to meet the PC133 SDRAM Registered
DIMM specification. For test purposes, the PLL can be bypassed
by strapping AV
Product Pin Configuration
Clock Driver with 9 Clock Outputs
FB_OUT
AGND
GND
GND
CC
V CC
V CC
1Y0
1Y1
1Y2
1Y3
1Y4
1G
Low-Noise Phase-Locked Loop
to ground.
1
2
3
4
5
6
7
8
9
10
11
12
24-Pin
L
24
23
22
21
20
19
18
17
16
15
14
13
PI6C2509-133
CLK_IN
AV CC
V CC
2Y0
2Y1
GND
GND
2Y2
2Y3
V CC
2G
FB_IN
PS8544D
11/17/09

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PI6C2509-133LEX Summary of contents

Page 1

... AV CC 09-0006 Clock Driver with 9 Clock Outputs Description The PI6C2509-133 is a “quiet,” low-skew, low-jitter, phase-locked loop (PLL) clock driver, distributing low-noise clock signals for SDRAM and server applications. By connecting the feedback FB_OUT output to the feedback FB_IN input, the propagation delay from the CLK_IN input to any clock output will be nearly zero. ...

Page 2

... Functional Table Note either Pin Functions 09-0006 ) PI6C2509-133 Low-Noise, Phase-Locked Loop Clock Driver with 9 Clock Outputs PS8544D 11/17/09 ...

Page 3

... O O Note: 1. Continuous output current Recommended Operating Conditions Electrical Characteristics (Over recommended operating free-air temperature range) Pull Up/Down Currents 3. 09-0006 ° 3.135V Low-Noise, Phase-Locked Loop Clock Driver with 9 Clock Outputs – – – – – PI6C2509-133 ° μ º PS8544D 11/17/09 ...

Page 4

... Note: These switching parameters are guaranteed, but not production tested. 09-0006 Low-Noise, Phase-Locked Loop Clock Driver with 9 Clock Outputs =3.3V ±0.3V 0~70° 15pF – – =3.3V ±0.165V –40~85° 15pF – – PI6C2509-133 PS8544D 11/17/09 ...

Page 5

... Pericom Semiconductor Corporation 3545 N. 1st Street, San Jose, CA 95134 1-800-435-2335 • www.pericom.com DESCRIPTION: 24-Pin, 173-Mil Wide, TSSOP PACKAGE CODE PI6C2509-133 Low-Noise, Phase-Locked Loop Clock Driver with 9 Clock Outputs DOCUMENT CONTROL NO 1312 REVISION: E DATE: 03/09/05 0.09 .004 .008 0.20 0.45 .018 0.75 ...

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