MC44CC374T1AEF Freescale Semiconductor, MC44CC374T1AEF Datasheet - Page 14

• Manufacturer Part Number: MC44CC374T1AEF
• Description: Modulator / Demodulator CMOS MOD R3.0 374T1A
• Manufacturer: Freescale Semiconductor

Specifications of MC44CC374T1AEF

• Package / Case: SOIC-16
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

trol registers (Control and Frequency) and one data/status
register. The new MC44CC373/374 family has the same reg-
ister configuration and may be programmed with the same
program software as the legacy devices. This backward com-
patibility allows a faster migration to new product redesigns.
There are some additional control features that may be used
in new designs. However, it is not necessary to program
Table 13. Control Register (High-order) Bit Description
MC44CC373
14
MSB
Bit Name
15
14
13
12
11
10
R15
Adr
9
8
The legacy MC44BS373/4 modulators had two 16-bit con-
1
1
SYSL
AUX
LOP
Adr
SO
PS
X3
X2
AUX
R14
0
Address Function bit. Must be set to a logic 1.
Gates the AUX
Sound Oscillator On/Off
Logic Output Port
Picture-to-sound carrier ratio
Test Mode bits, must be set to logic 0 for normal
operation.
Test Mode bit. May be used for VHF divider
System L Enable - Selects AM sound and positive
video modulation. (Applies to MC44CC373xxx
devices only. For the MC44CC374xxx devices this
bit is set to 0 and may not be modified).
R13
SO
0
1
0
1
0
1
0
1
0
1
0
Disable AUX
Enable AUX
Sound oscillator is on (normal mode).
Sound oscillator is disabled (osc and PLL
section bias is turned off).
LOP pin is low voltage.
LOP pin is high impedance.
Picture-to-sound carrier ratio is 12 dB.
Picture-to-sound carrier ratio is 16 dB.
System B/G enabled (FM sound and
negative video modulation).
System L enabled (AM sound and positive
video modulation).
LOP
R12
0
IN
CONTROL AND DATA REGISTER - DEFINITIONS
pin
R11
Description
PS
0
IN
IN
pin.
pin.
TEST MODE
R10
X3
0
Figure 6. Control Register Format
R9
X2
0
SYSL
R8
0
PWC
R7
0
these bits when upgrading a legacy system with the new
modulator family.
CONTROL REGISTER FORMAT
descriptions for the High-order and Low-order bits (bytes) are
listed in
Table 14. Control Register (Low-order) Bit Description
OSC
R6
Bit Name
0
7
6
5
4
3
2
1
0
The control register format is shown in
SREF
SFD1
SFD0
PWC
OSC
ATT
ATT
Table 13
R5
X5
X4
0
SFD1 SFD0 SREF
Peak White Clip enable/disable
UHF oscillator On/Off
Modulator output attenuated.
Sound subcarrier frequency control bits.
Sound PLL reference frequency
Test Mode bits, must be set to logic 0 for normal
operation.
R4
0
0
1
0
1
0
1
0
1
and
Peak White Clip on (system B/G).
Peak White Clip off (system L).
Normal
operation.
UHF oscillator
disabled.
Normal operation.
Modulator output attenuation (sound and
video modulator sections bias is turned off).
Sound reference frequency = 31.25 kHz
Sound reference frequency = 62.5 kHz
SFD1 SFD0
Table 14
MC44CC373/
R3
374CAxxx
1
0
0
1
1
R2
0
Description
respectively.
0
1
0
1
Freescale Semiconductor
MC44CC374T1Axx
UHF oscillator disabled.
Normal operation.
4.5 MHz
5.5 MHz
6.0 MHz
6.5 MHz
TEST MODE
R1
X5
0
Figure 6
Frequency
LSB
R0
X4
0
Digital Home
and the
Reset
State