MC44CC374T1AEF Freescale Semiconductor, MC44CC374T1AEF Datasheet - Page 4

• Manufacturer Part Number: MC44CC374T1AEF
• Description: Modulator / Demodulator CMOS MOD R3.0 374T1A
• Manufacturer: Freescale Semiconductor

Specifications of MC44CC374T1AEF

• Package / Case: SOIC-16
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 2. Power On Default Settings
POWER ON SETTINGS
POWER ON RESET
until the power supply has stabilized. Additionally a delay of
approximately 2 seconds allows the crystal oscillator to stabi-
lize before the digital section begins normal operation.
TRANSIENT OUTPUT INHIBIT
the UHF PLL is acquiring a lock on the desired frequency, the
Sound and Video modulators are turned OFF during a time
out period in two cases: Power On and UHF oscillator power
On (OSC bit switched from OFF to normal operation). There
is a time out of 262 ms until the output is enabled. This lets
the UHF PLL settle to its programmed frequency.
STANDBY MODES
power consumption. The sound oscillator, UHF oscillator, and
the video and sound modulator section’s bias are internally
turned OFF. The I
Control Registers is not allowed in Standby Mode.
SYSTEM L OR B/G SELECTION
ing functions:
MC44CC373
4
UHF oscillator frequency (MHz)
RF
Sound frequency (MHz)
Sound reference frequency (kHz)
Logic Output Port (logic level)
Picture to sound ratio (dB)
Peak White Clip (state)
System Standards
1. Refer to application note to obtain 82 dBμV or other RF levels.
At power-on, the modulators are configured with pre-programmed default settings as listed in
A power-on reset circuit holds the digital portion in reset
To minimize the risk of interference to other channels while
During standby mode, the modulator is switched to low
The standby mode is set with a combination of 3 bits:
OSC=1, SO=1 and ATT=1 for MC44CC373/374CAxxx
OSC=0, SO=1 and ATT=1 for MC44CC374T1Axx
Programming of the Frequency Registers or the Optional
The SYSL enable control bit internally switches the follow-
OUT
•
•
power (dBμV)
SYSL = 0 enables B/G system
— Video modulation polarity: Negative
— Sound modulation: FM
SYSL = 1 enables L system
— Video modulation polarity: Positive
— Sound modulation AM
Operating Mode
Part Number
2
C bus section remains active.
(1)
MODES OF OPERATION AND FUNCTIONAL DESCRIPTION
MC44CC373CA
591.25
31.25
Low
B/G
5.5
On
89
12
MC44CC373CAS
CRYSTAL REFERENCE OSCILLATOR
for the legacy modulators.
vide-by-128, resulting in a reference frequency of 31.25 kHz
for the phase detector.
UHF PLL SECTION
is divided by 2 before it is sent to the divide-by-8 prescaler
and then the programmable divider.
the state of control bits N0 to N11 and is the binary number
for the number of 250 kHz steps in the desired RF
quency. The divider-ratio N for a desired frequency F (in
MHz) is given by:
with:
N
591.25
31.25
Low
B/G
The reference crystal frequency is 4.0 MHz, the same as
The reference crystal oscillator if followed by a fixed di-
The UHF VCO runs at twice the desired RF frequency and
The programmable divider division-ratio is controlled by
5.5
On
89
12
=
Programming a division-ratio N = 0 is not allowed.
Programming of the N value must be performed while
the modulator is in normal mode, not standby mode.
2048
Default Values
×
N11
+
MC44CC374CA
1024
N
591.25
=
31.25
×
Low
B/G
5.5
On
89
12
N10
(
----------------- -
NOTE:
2
16
×
Table
F
+
)
……
×
Freescale Semiconductor
128
--------- -
2.
4
+
4
MC44CC374T1A
×
N2
871.25
+
31.25
Low
B/G
Digital Home
5.5
On
89
12
2
×
OUT
N1
fre-
+
N0