PI6C410BAEX Pericom Semiconductor, PI6C410BAEX Datasheet
PI6C410BAEX
Specifications of PI6C410BAEX
Related parts for PI6C410BAEX
PI6C410BAEX Summary of contents
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Features • 14.318 MHz Crystal Input • Selectable of 100, 133, 166, 200, 266, 333, and 400 MHz CPU Output Frequencies • SMBus: Power Management Control • Spread Spectrum support (-0.5% down spread) • Packaging (Pb-free & Green): –56-Pin TSSOP (A) Output Features • Four Pairs of Differential CPU Clocks • Five Pairs of SRC Clocks • Seven PCI Clocks • One 48 MHz USB clock • Two REF clocks Block Diagram XT AL_IN XT AL OSC XT AL_OUT PLL 1 SDA SM Bus Logic ...
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Pin Descriptions Pin Name Type REF[0:1] Output XTAL_IN Input XTAL_OUT Output CPU[0:3] & CPU[0:3]# Output SRC[0:4] & SRC[0:4]# Output PCIF[0:2] Output PCI[0:3] Output USB_48 Output FS_A Input FS_B / TEST_MODE Input FS_C / TEST_SEL Input IREF Input VTT_PWRGD# / Input PWRDWN SDA I/O SCL Input V Power DD_PCI V ...
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Functionality Frequency Selection FS_C FS_B FS_A Notes: 1. Refer to DC Electrical Characteristics for FS_A, FS_B and FS_C (Vih_FS, Vil_FS) threshold levels Test Mode Selection TEST_MODE CPU 1 REF/N ...
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Serial Data Interface (SMBus) PI6C410B is a slave only SMBus device that supports indexed block read and indexed block write protocol using a single 7-bit ad- dress and read/write bit as shown below. Address Assignment Data Protocol (Write) 1 bit 8 bits 1 8 bits Start Slave Register Ack bit Addr: D2 offset (Read) 1 bit 8 bits 1 8 bits Start Slave Register Ack bit Addr: D2 offset Note: 1. ...
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Data Byte 1: Control Register Bit Descriptions Spread Spectrum On Off CPU_0 output enable Enabled Disabled (Hi-Z) CPU_1 output enable Enabled Disabled (Hi-Z) 3 Reserved CPU_2 output enable Enabled Disabled (Hi-Z) CPU_3 output enable Enabled Disabled (Hi-Z) REF0 Output Enable Enabled Disabled REF1 Output Enable Enabled Disabled Data Byte 2: Control Register Bit Descriptions USB_48 Output Enable Enabled Disabled ...
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Data Byte 3: Control Register Bit Descriptions SRC_0 Output Control Free Running 1 = Stopped with PCI_STOP# SRC_1 Output Control Free Running 1 = Stopped with PCI_STOP# SRC_2 Output Control Free Running 1 = Stopped with PCI_STOP# SRC_3 Output Control Free Running 1 = Stopped with PCI_STOP# SRC_4 Output Control Free Running 1 = Stopped with PCI_STOP# PCIF0 Output Control Free Running 1 = Stopped with PCI_STOP# PCIF1 Output Control Free Running 1 = Stopped with PCI_STOP# PCIF2 Output Control Free Running 1 = Stopped with PCI_STOP# 09-0003 ...
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Data Byte 4: Control Register Bit Descriptions CPU_0 Output Control Free Running 1 = Stopped with CPU_STOP# CPU_1 Output Control Free Running 1 = Stopped with CPU_STOP# CPU_2 Output Control Free Running 1 = Stopped with CPU_STOP# CPU_3 Output Control Free Running 1 = Stopped with CPU_STOP# CPU_0 Pwrdwn drive mode Hi- Driven in Pwrdwn CPU_1 Pwrdwn drive mode Hi- Driven in Pwrdwn CPU_2 Pwrdwn drive mode Hi- Driven in Pwrdwn 7 CPU_3 Pwrdwn drive mode 1 = Hi- Driven in Pwrdwn Data Byte 5: Control Register ...
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Data Byte 6: Control Register Bit Descriptions FS_A Reflects the value of the FS_A pin sampled on power FS_A was low during Vtt_ Pwrgd# assertion FS_B Reflects the value of the FS_B pin sampled on power FS_B was low during Vtt_ Pwrgd# assertion FS_C Reflects the value of the FS_C pin sampled on power FS_C was low during Vtt_ Pwrgd# assertion PCI_Stop Output Control 0 = Enabled, all stoppable PCI 3 and SRC clocks are stopped Disabled REF Output Drive Strength 1X Reserved Test Clock Mode Entry Control Normal REF/N or Hi-Z Test Clock Mode Hi- REF/N Data Byte ...
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Power Down (PWRDWN assertion) PWRDWN CPU, 133MHz CPU#, 133MHz SRC, 100MHz SRC#, 100MHz USB, 48MHz PCI, 33MHz REF, 14.318MHz Power Down (PWRDWN De-assertion) PWRDWN CPU, 133MHz CPU#, 133MHz SRC, 100MHz SRC#, 100MHz USB, 48MHz PCI, 33MHz REF, 14.318MHz 09-0003 Clock ...
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Tristate Specifications CPU & SRC Tristate clock truth table Signal Pwrdwn pin 0 CPU[0:3], 1 SRC[0:4], 1 Spread Spectrum Specifications Supports Spread Spectrum clocking and can be enabled and disabled via SMBus control. The maximum Spread Spectrum Modula- tion is –0.5% down spread with frequency from 30KHz to 33K Hz. SSC ON Min CPU @ 399.000MHz 2.4993 CPU @ 332.500MHz 2.9991 CPU @ 266.000MHz 3.7489 CPU @ 199.500MHz 4.9985 CPU @ 166.250MHz 5.9982 CPU @ 133.000MHz 7.4978 CPU @ 99.750MHz 9.9970 ...
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Current-mode output buffer characteristics of CPU and SRC V DD (3.3V ±5 OUT V = 0.85V max OUT Figure 3. Simplified diagram of current-mode output buffer Host Clock Buffer characteristics Symbol OUT ...
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Absolute Maximum Ratings (Over operating free-air temperature range) Symbol Parameters V 3.3V Core Supply Voltage DD_A V 3.3V I/O Supply Voltage DD V Input High Voltage IH V Input Low Voltage IL Ts Storage Temperature V ESD Protection ESD Note: 1. Stress beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. DC Electrical Characteristics ( Symbol Parameters V 3.3V Core Supply Voltage DD_A V 3.3V I/O Supply Voltage DD V 3.3V Input High Voltage ...
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AC Switching Characteristics Symbol Outputs CPU, SRC rise fall PCI/PCIF, REF rise fall USB rise fall ΔT / rise CPU, SRC ΔT fall T CPU skew T SRC skew T PCI/PCIF, REF skew T CPU jitter T SRC ...
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Configuration test load board termination PI6C410B 475Ω 1% Figure 4. Configuration test load board termination Note: 1. Maximum 10” trace length for CPU outputs at 200 MHz. Maximum 16” trace length for SRC outputs at 100 MHz. 09-0003 Clock Generator for Intel PCIe Rs 33Ω 5% TLA Rs 33Ω 5% TLB Rp Rp 49.9Ω 49.9Ω ...
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... Ordering Code PI6C410BAE Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ 2. Number of transistors = TBD Pb-free and Green Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com 09-0003 All trademarks are property of their respective owners. Clock Generator for Intel PCIe DESCRIPTION: 56-pin, 240-mil wide TSSOP PACKAGE CODE: A56 DOCUMENT CONTROL #: PD-1502 ...