HL82571EB Intel, HL82571EB Datasheet - Page 11

• Manufacturer Part Number: HL82571EB
• Manufacturer: Intel

Specifications of HL82571EB

• Lead Free Status / RoHS Status: Not Compliant

82571/82572 Specification Update
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ARC Halts when SMBus Sslave Address is Set to 0x00.
Rx Packet NotificationTimeout Does Not Reset after Master
Reads Fragment.
BMC Configuration Commands are Discarded when there is
Heavy Manageability Traffic Load.
Duplicate Fragments Might Be Sent to the BMC.
Memory Buffer Leaks Under Heavy SMBus Traffic Load.
First Two Bytes of a Rx Packet Forwarded to the BMC Might Be
Dropped, Degrading Performance.
SMBus Might Hang if the BMC Is Reset in the Middle of a
Transaction.
Certain Malformed IPV6 Extension Headers are not Processed
Correctly by the Device.
Completion with CA or UR Status Is Considered Malformed.
HMAC Calculation For RMCP+ Session Establishment Is
Incorrect.
SOL Payload Fails to Activate with Encryption Activation Bit Set
When Session Was Not Established with Encryption.
User Password Not Being Used (Instead of the Kg) when
Calculating the SIK.
Firmware Resets While Link Is Down
Integrity Value in RMCP+ session establishment
Username in RAKP1 Message Must Be Padded to 16 Bytes
Device Accepts Invalid User Name when RMCP+ Session Owner
Configuring RMCP+ Password from the BMC
“Update User Password” Command Incorrectly Accepts Less
Than 20 Bytes of Data
Byte Enables 2 and 3 Are Not Set on MSI Writes
Wakeup Event Occurs on Magic Packet that Doesn’t Pass
Address Filter
SKP (SKIP ordered set) Will Reset TS (Training Sequence)
Count.
82571EB-82572EI Does Not Correctly Implement Master/Slave
Resolution.
82571EB-82572EI Improperly Implements the Auto-
Negotiation Advertisement Register.
PCIe: Occasionally, When Receiving a Corrupted Completion
with a TAG x to Another TAG “a” Might Result in Device Hang or
Data Corruption.
RDTR: No Write Back on RX Packet When Too Close to Previous
Packets.
82571/82572 Overwrites Transmit Descriptors in Internal
Buffer.
Link Indication: LED Remains On In D3 Power State in SerDes
Mode.
PCIe: Missing Replay Due to Recovery During TLP Transmission
PCIe: LTSSM Moves from L0 to Recovery Only When Receiving
TS1/TS2 on All Lanes
Errata
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