MSC8144ADS Freescale, MSC8144ADS Datasheet
MSC8144ADS
Specifications of MSC8144ADS
MSC8144ADS Summary of contents
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... MSC8144ADS Processor Board Reference Manual MSC8144ADSRM Rev 0, February 2007 ...
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... Semiconductor was negligent regarding the design or manufacture of the part. Freescale™, the Freescale logo, CodeWarrior, QUICC Engine, and StarCore are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006, 2007. MSC8144ADSRM Rev. 0 2/2007 ...
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... Standalone Mode 1-2 1.1.2 AMC Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.1.3 Debugging Chain Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.1.3.1 Single . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.1.3.2 Chain 1-2 1.2 MSC8144ADS processor board Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.3 External Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 1.4 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5 1.5 Definitions, Acronyms, and Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6 1.6 Related Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7 1.7 Specifications ...
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... BCSR2 Board Control Register 5-25 5.14.4 BCSR3 Board Control Register 5-26 5.14.5 BCSR4 Board Control Register 5-27 5.14.6 BCSR5 Board Control Register 5-28 5.14.7 BCSR6 Board Control Register 5-28 5.14.8 BCSR7 Board Control Register 5-28 iv MSC8144ADS Reference Manual, Rev. 0 Freescale Semiconductor ...
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... Power Supply System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-33 5.15.1 Primary Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-33 5.15.2 Power Supply Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-33 5.16 Interconnection Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-35 6 Expansion Options 6.1 PTMC Expansion Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1 6.2 AMC in ATCA Environment 6-10 7 Replacing the MSC8144 DSP Freescale Semiconductor MSC8144ADS Reference Manual, Rev. 0 Contents v ...
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... Contents vi MSC8144ADS Reference Manual, Rev. 0 Freescale Semiconductor ...
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... AMC card in the ATCA system. The ADS board uses a triple AMC form factor. 1.1 Working Configurations The MSC8144ADS has two basic operating modes, as discussed in the following sections. In addition to the basic modes, there are two debugging chain options that can be used with either operating mode. ...
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... MPC8560, use the P11 connection, and configure the board for this using the DIP switches (SW[2–3]). 1.1.3.2 Chain A chain connection can be used to debug applications for the MSC8144ADS processor board. In such a case, the debugger can only be connected to the MSC8144-MPC8560 via the P1 connection. Use the DIP switches (SW2.3) to configure the board for this. ...
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... Main Power-On Reset (for both Host and Slave); — Hard Reset, Soft Reset, and NMI for MSC8144 1.3 External Connections The MSC8144ADS processor board interconnects with external devices via the following set of connectors (see Figure 1-1 and Figure 1-2): Double RS232 9-pin connector (P2). ...
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... Power jack for external power supply (P10) 11. ISP 14-pin connector to program Altera FPGA. (P3) MSC8144 OnCE Debug connector 14-pin (P1 for single or chain). 12. 13. AMC edge connector (P26 Figure 1-1. MSC8144ADS processor board External Connections (front view) 13 Figure 1-2. MSC8144ADS processor board External Connections (rear view) 1 ...
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... C TDM Bus SPI solder UTOPIA2 Bus bridge Diff Signals: SGMII & SRIO MICTOR LA connector SPI GETH interfaces sRIO hw switch a. Optional function Mode <number> mean MSC8144 Pinmux Mode MSC8144ADS Reference Manual, Rev. 0 Block Diagram C RJ45 GPHY P7 Marvell 88E1145 ports RJ45 1 Cooper cfg ...
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... Power Supply Unit RGMII Reduced Gigabit Media Independent Interface RMII Reduced Media Independent Interface RCW(L,H) Reset Configuration Word (Low/High) RTC Real Time Clock SGMII Serial Gigabit Media Independent Interface SerDes Serializer/Deserializer SMB Type of Mini-RF connector 1-6 Definition MSC8144ADS Reference Manual, Rev. 0 Freescale Semiconductor ...
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... MSC8144 Data Sheet — MSC8144 Reference Manual — MSC8144 ADS Processor Board Hardware Getting Started — MSC8144 ADS Using Code Warrior™ and MSC8144ADS Kit Configuration Guide „ Third Party Documentation — PICMG2.15 PCI Telecom Mezzanine/Carrier Card Specification 1.7 Specifications The MSC8144ADS processor board specifications are given in Table 1-2 ...
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... GMII, TBI, RGMII, RTBI; configured as RGMII on the ADS. with Eight TDM ports, shared RS-232 transceiver allows data exchange at 115 Kbps Compliant with standard. Used to control peripheral devices 8/16-bit UTOPIA level II interfaces for ATM running MHz. Acts as a master MSC8144ADS Reference Manual, Rev. 0 Specifications communication ports MSC8144 Freescale Semiconductor ...
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... Refer to packing list and verify that all items are present. „ Save packing material for storing and reshipping of equipment. 2.2 Installation Instructions To install the MSC8144ADS processor board properly, perform the following steps in the order indicated: 1. Verify that Jumpers and Switches are in default positions (see Chapter 4, Controls and Indicators for a list of default positions) ...
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... Hardware Preparation and Installation The LEDs operate in the following sequences during reset: LD8 and LD1 light 1. 2. LD3 and LD4 light and then go off 2-2 Figure 2-1. LED Locations MSC8144ADS Reference Manual, Rev. 0 LD1- LD7 LD8 Freescale Semiconductor ...
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... Memory Map Each of the processors on the ADS board uses its own memory map. 3.1 MPC8560 Host Mapping for the MSC8144ADS The MPC8560 Memory Controller governs all access to the processor memory slaves. Consequently, the memory map may be reprogrammed according to specific user needs. After performing a Hard Reset sequence, the debug host may initialize the memory controller via the JTAG/COP connector to allow additional access to bus addressable peripherals ...
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... Empty Space — — Empty Space — MPC8560 PTMC — Empty Space — Empty Space — — Empty Space MSC8144ADS Reference Manual, Rev. 0 Volume Device Name in Byte (PC28F256P30B85) (32 Mbyte) Intel Strata-Flash 16 Mbyte PC28F128P30B85 Volume in Byte On-board 256 Mbyte @ 32 bit is available (512 Mbyte opt) — ...
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... Controls and Indicators This chapter describes controls and indicators of the MSC8144ADS processor board, which includes switches, jumpers, LEDs, and push buttons. JP5 Figure 4-1. MSC8144ADS Switches, Jumpers, LEDs, Push Buttons Locations Freescale Semiconductor MSC8144ADS Reference Manual, Rev JP9 LD1- LD7 LD8 ...
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... SW1.8: (RCW[12]) Boot Port Select (labelled RC12 on board) 0 Sets PCI as boot port (default) (works together with SW3.1–SW3.3) for more details and all options, see MSC8144 Reference Manual, under the RCW field Factory setting: '00000110 MSC8144ADS Reference Manual, Rev. 0 Freescale Semiconductor ...
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... MSC8144 Reference Manual, under the RCW field SW3.5: Clock Range (RCFG_CLKIN_RNG) (RCW_CLK_RNG) 0 Clock_in frequency range is less than or equal 66 MHz (default) 1 Clock_in frequency is greater than 66 MHz. SW3.6–SW3.8: Reserved 111 Default Factory setting: ’10010111’ MSC8144ADS Reference Manual, Rev. 0 DIP Switches 4-3 ...
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... MSC8144 Reference Manual, under the RCW field SW4.8: Device ID 0 Device ID (default) (works together with SW1.1–SW1.5) For more details, see MSC8144 Reference Manual, under the RCW field Factory setting: '01000010 MSC8144ADS Reference Manual, Rev Freescale Semiconductor ...
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... CLKIN, PCI Core CPM & CCB DDR LBC 4.2 Jumpers Figure 4-1 shows the locations of the jumpers. MSC8144ADS processor board jumpers settings are described in 4-5, below. Jumper JT1 Soldered jumper. Sets GE interface voltage to 2.5V or 3.3V. • CLOSED, 2.5V • OPEN, 3.3V ...
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... Controls and Indicators 4.3 LEDs Figure 4-1 shows the locations of the MSC8144ADS processor board LEDs that are described in Table 4-6. No. Name LD1 PG LD2 IND LD3 SIG0 LD4 SIG1 LD5 BOOT LD6 GPIO LD7 READY LD8 12V LD9 DEBUG (*) Critical indicator 4.4 Push Buttons See Figure 4-1 for the locations of the board push buttons ...
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... TPS51116 power supply on the MSC8144ADS. 5.1.2 DDR1 The MSC8144ADS can use two DDR1 SODIMM modules. These have ECC functionality and include DDR1 parts with a 16- or 8-bit size, respectively. The DDR1 modules each draw 2.6 V from TPS51116 power supply on the MSC8144ADS. 5.1.3 DDR Connection The main memory module used is the Micron DDR2 SODIMM MT8HTF6464HDY-53E, with 512 Mbyte, working at 533 Hz, and 64 bits wide ...
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... DQS1 ODT[1–0] 122 NC/GND Vref Vref 1.8 V/2.6 V VDDQ VTTREF & VTT 2 1.3 V VDDQ 1 0.9 V VDDQ MSC8144ADS MSC8144, Rev. 0 TPS51116 TPS51116 VTT 12 V 0.9 V/1. V VREF 5 V VDD DDR_VDD VDDQSET 2 C EEPROM mounted on the Memory System DDR1 DDR2 Freescale Semiconductor ...
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... SPI bus. Three analog ports are tied to the RJ-45 connectors and the MSC8144 port G1 through the GETH phy. This interconnection allows exchanging of data between the host and the MSC8144, and to connect any port out to the LAN. Figure 5-2 shows the GETH interconnection. Freescale Semiconductor MSC8144ADS MSC8144, Rev. 0 MPC8560 PCI Host Bus 5-3 ...
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... VSC7380VU RGMII[0,3]_TxClk RGMII[0,3]_RxClk RGMII[0,3]_Rx_Ctrl RGMII[0,3]_RD[3–0] RGMII[0,3]_Tx_Ctrl RGMII[0,3]_TD[3–0] Clk Addr = 0 port 0 port3 port 5,7 88E1145 p.p. 1,2 MDX_Addr = 0x13, 0x12 MSC8144ADS MSC8144, Rev. 0 diff To AMC 11,12 SerDes 14,15 29,30 SerDes 32,33 RJ45 Combo MPC8560 (TSEC1) TSEC2_RX_CLK TSEC2_GTX_CLK TSEC2_TX_EN TSEC2_TXD[3–0] TSEC2_RX_DV TSEC2_RXD[3– ...
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... Reset), there are two sets of control signals: BCSR0[1], BCSR2[4] and BCSR0[2], and BCSR2[5] that allow isolation of the framer outputs. Freescale Semiconductor 2 C interface from the Host processor 2 C controller. Power down signal CODEC_EN from MSC8144ADS MSC8144, Rev. 0 Serial RapidIO Ports 5-5 ...
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... TDM[0–3] RSYNC TDM1TSYNC Figure 5-3. TDM Scheme A TLV320AIC22 CODEC BCLK MCLK FSYNC DOUT RESET DIN PWRDWN Master Mode Figure 5-4. TDM Scheme B MSC8144ADS MSC8144, Rev. 0 TSSYNCIO TTIP TRING RTIP RRING MCLK 2.048 MHz +/-50 ppm MSC8144 TDM0TCLK TDM0TSYNC TDM0RDAT TDM0TDAT Freescale Semiconductor ...
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... RXD = Receive Data (I) RTS 8 • DSR = Data Set Ready (I) NC • CTS = Clear To Send ( • RTS = Request To Send (O) NC RS-232 Serial Port Connectors MSC8144ADS MSC8144, Rev. 0 RS-232 on UART Comment TDM3 Bit 3 Nibble-Parallel Mode for DS3/E3 CTS independent for receive/transmit for MCS8144 TDM — ...
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... MSC8144 2 MPC8560(host FPGA JTAG-to-I C controller SPD DDR2 MPC8144 ZM7108 Power Manager TLV320AIC22PT CODEC Expander Expander 2 2 PTMC SMII I C EEPROM 2 PTMC RMII I C EEPROM MSC8144ADS MSC8144, Rev. 0 Address a M/S — S 50h S 51h S 68h Master/Slave Address a M/S -/57h M/S — b M/S — S ...
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... Registers 11–14 and 17 are used to configure the device inputs, outputs, and clocking. „ Register 21 is used for Device ID and preamp control. Freescale Semiconductor 2 C bus is shared with the bus, port 2 of the host MPC8560. The I MSC8144ADS MSC8144, Rev Bus Interconnection 2 C-compatible 2 ...
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... OFF position. 5- SPI_SEL PU SPI_CLK PU SPIMISO PU SPIMOSI ICS30703 CS SCLK DIN MOSI,MISO,CLK SPI Flash Figure 5-7. SPI Bus Devices MSC8144ADS MSC8144, Rev bus and can be provided from the MSC8144 SPI_SEL SPI_CLK SPIMISO SPIMOSI GPIO18,1,16,0 FPGA VSC7380 SI_nEN SI_CLK SI_DI SI_DO Freescale Semiconductor ...
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... Freescale Semiconductor SPI Bus Device Select RGMII Switch VSC7380 ICS30703 Clock Synthesizer DS26521-1 E1/T1 Framer DS26521-2 E1/T1 Framer MPC8560 SPI as slave Serial Flash M25P64 All disable MSC8144ADS MSC8144, Rev. 0 Reset Operation and Configuration Note default state 2 C 5-11 ...
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... RCW[0–16] configuration signals used for Reduced Configuration Word apply the similar way. 5-12 FPGA nHRSTh nSRSTh nREADY PD nHRST_REQ PG From PS PU nPRST PU nHRST PU nSRST Figure 5-8. ADS Reset Scheme 2 C EEPROM, the LDFAIL output becomes high MSC8144ADS MSC8144, Rev. 0 MPC8560 HRESET HRESET_REQ SRESET READY MSC8144 PORESET HRESET SRESET Freescale Semiconductor ...
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... MHz Reserved 0 RCW3. Selects - whether to enable or disable power to the RapidIO and Ethernet blocks. MSC8144ADS MSC8144, Rev. 0 Reset Operation and Configuration MSC8144 Reduced Mode RS[0-2] within ‘011’ to ‘111 Value Setting Reserved 000 RIO prescaler timer 011000 enabled.OCeaN clock ...
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... EEPROM Setting Value Reserved 00 Disable watchdog timer 0 Boot port configured with 0 no SMII RCW[15–14]. - Boot port configuration value 1 and 0. MSC8144ADS MSC8144, Rev. 0 Reduced Mode RS[0-2] within ‘011’ to ‘111 Value Setting RCW[16],RCW[3] 00000 - no SGMII protocols MODCK[15:13 reset Slave ~RCW[2] 1 ...
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... Pin multiplexing 4–2 000 RCW[11–10]. - Pin multiplexing 1–0 RCW[9–4]. - Device ID Reserved 000 MSC8144ADS MSC8144, Rev. 0 Reset Operation and Configuration Reduced Mode RS[0-2] within 011 to 111 Setting Value Boot port selected 2 0 RCW[13–12]. 10 Boot port select PCI PCI host disabled ...
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... CLKIN pin. The CLK2 output drives variant frequencies to MSC8144 PLL2 (Figure 5-11), which is connected to the PCI_CLK_IN input. Figure 5-11. Programmable Clock Block Diagram 5-16 PCI Host Clock Ext CLK 1 JUMPER 1 2 PCI_CLK_IN LVDS Osc. 100MHz MSC8144ADS MSC8144, Rev. 0 MSC8144 CLKIN CLKOUT PCI_CLK_IN SRIO_REF_CLK SRIO_REF_CLK Freescale Semiconductor CLKOUT ...
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... Two integrated TSEC 1Gbps in RGMII mode. „ CPM SPI port in multi-master mode; „ CPM FCC1 Utopia bus; Freescale Semiconductor MSC8144 JTAG JTAG contr Mux FPGA Figure 5-12. JTAG Multiplexing MSC8144ADS MSC8144, Rev. 0 Reset Operation and Configuration MPC8560 JTAG Debug Host 1 5-17 ...
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... The e500 core is allowed to boot without waiting for configuration by an external master 5-18 Mode PCI Mode. Non PCI-X interface RGMII mode buffer delays for LALE) RapidIO ID cfg_sys_pll[0:3] cfg_pll_core[0:1] MSC8144ADS MSC8144, Rev. 0 Value Implemented 1 Internal Pull-Up 1 Internal Pull-Up 1 Pull-Up 1/0 4.7k Pull-Up or ...
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... Flash memory and the MPC8560 multiplexed local bus. The interface also supports single/page asynchronous and burst synchronous with 16-bit accesses. Freescale Semiconductor Mode mode transmit clock MSC8144ADS MSC8144, Rev. 0 Reset Operation and Configuration Value Implemented 1/0 4.7k Pull-Up/Down 1/0 11/00 4 ...
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... MPC8560 Multiplexed Local bus. 5-20 LBIU <40MHz CLK CS0 ALE LAD[0–15] LAD[8–26] LAD[7] LA[27–30] LGPL2 LWE0 nPRST MSC8144ADS MSC8144, Rev. 0 StrataFlash P30 CLK CE# ADV# DQ[15–0] A[23–5] (A[24]) 32MB A[4–1] OE# WE# RST# Freescale Semiconductor ...
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... Multiplexed Local bus. Freescale Semiconductor CS2 CS ALE/AS ALE A[14–0] LAD[0–7] D[7–0] LGPL2 RD/DS/ LWE0 WR/R/W nDS3RST RESET from FPGA PTYPE[0–2] = 000 for Intel Asynchronous Figure 5-16. DS3 on the LBIU MSC8144ADS MSC8144, Rev. 0 Reset Operation and Configuration XRT79L71 mode 5-21 ...
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... INT RTC DS1374 INT E1/T1 E1/T1 DS26251 DS26251 x2 INTB INTB DS3 XRT79L71 INT Figure 5-18. ADS Interrupt Scheme MSC8144ADS MSC8144, Rev. 0 EPM1270F256-5 MPC8560 IRQ_OUT IRQ1 IRQ2 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ8 IRQ9 IRQ10 O.D. FPGA Freescale Semiconductor ...
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... Sections of the BCSR slice control registers generally have low active notations. This means that a bit function will be enabled while the bit is zero. When a bit is set to high ( related function is disabled. The most significant bit is bit 0. Freescale Semiconductor Board Control and Status Registers (BCSRs) MSC8144ADS MSC8144, Rev. 0 5-23 ...
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... MSC8144 GPIO[0:3] = 4’b1010 code is present. The LED is unlit when in its inactive (default) state (high). During the Reset Configuration sequence the LED indicates the HRESET assertion. 5-24 Function Green LED is illuminated when SIGNAL0 Red LED is illuminated when SIGNAL1 is MSC8144ADS MSC8144, Rev. 0 DEF on ATT. PRST 0 R,W 0 R,W ...
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... On the board, the BCSR2 acts as a control reset register. The BCSR2, which may be read or written at any time, receives its defaults upon Power-On-Reset. All reset signals mentioned Freescale Semiconductor Board Control and Status Registers (BCSRs) Function 2 C2 port over Utopia MSC8144ADS MSC8144, Rev. 0 DEF ATT. 1 R,W 1 R,W ...
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... Table 5-12. BCSR3 Special Function 1 (Offset 3) BIT MNEMONIC 0 PRST Power-on-Reset. Writing low will generate PORESET pulse for MSC8144ADS to re-configure it except the M3 Reset. 1 M3PRST M3 Power-on-Reset. Writing low will generate RESET pulse for the MSC8144 M3 Memory and main PORESET for the whole board.. 2 DEBUG Debug Request ...
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... Board Control and Status Registers (BCSRs) Function Function Table 5-14. TDM Clock Divider TDMDIV[0–2] Frequency 1 16 MHz 2 8 MHz 3 4 MHz 4 2 MHz 0,5–7 Disabled MSC8144ADS MSC8144, Rev. 0 DEF on ATT. PRST 0 R,W SW2 R,W 1 R,W DEF on ATT. PRST ‘000’ ...
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... CLKRNG Clock-in Range. MSC8144 Configuration pin 25 PHYStoR SGMII Phy Mode. Low configures the GETH Phy in SGMII Mode. High sets the phy in RGMII Mode. 5-28 Function Function Function MSC8144ADS MSC8144, Rev. 0 DEF on ATT. PRST a . SW4.1-4.3 R,W SW4.4-4.8 R,W DEF on ATT PRST SW1.1-1.8 ...
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... FA Module Activation. High with PORESET places FA Module in operation mode. 5 FA_M3_ACT FA_M3 Module Activation. High with PORESET places FA_M3 Module in operation mode. Freescale Semiconductor Board Control and Status Registers (BCSRs) Function Function Function MSC8144ADS MSC8144, Rev. 0 DEF on ATT. PRST ‘1’ R,W 1 R,W DEF on ATT. PRST SW2 ...
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... Function Function Function 2 C EEPROM failed due to an error. Low Description ‘00’ - ‘01’ PCI protocol is supported ‘10’ Incapable PCI protocol ‘11’ Disconnected MSC8144ADS MSC8144, Rev. 0 DEF on ATT. PRST 1 R,W 0 R,W Read At Programmed value Programmed value Read At Read coding from ...
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... Table 5-25. BCSR14 - FA_M3 Data Register (Offset 0xE) BIT MNEMONIC 0-7 FA_M3_DATA FA_M3 Data. Data register for FA_M3 operations. Freescale Semiconductor Board Control and Status Registers (BCSRs) Function Function Function MSC8144ADS MSC8144, Rev. 0 Read At AMC connector 8144 EE2 Pins ‘1111’ DEF on ATT. PRST 0 R,W DEF on ATT ...
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... The BCSR19 Register is a status register (read only). The BCSR19 fields are described below in Table 5-29. Table 5-29. BCSR19 Time Stamp 4 (Offset 0x13) BIT MNEMONIC 0-7 TIMEH Firmware Creation Hour. 5-32 Function Function Function Function MSC8144ADS MSC8144, Rev. 0 Read At Programmed Read At Programmed Read At Programmed Read At Programmed Freescale Semiconductor ...
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... The ZM7108 completely eliminates the need for external components for power management and POL converters programming, monitoring, and reporting. Parameters of the ZM7108 are programmable via the I product development and service. Table 5-31 shows the power distribution on the MSC8144ADS, for the MPC8560, and for the MSC8144. Freescale Semiconductor Function 2 C bus and can be changed by a user at any time during MSC8144ADS MSC8144, Rev ...
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... LDO3 MIC49150(1.5A) Fixed LDO9 MIC49150(1.5 A) — POL4 ZY7115(15 A) Fixed LDO4 Fixed LDO5 LT1764EQ_2.5 Fixed LDO6 FAN1655MTF MSC8144ADS MSC8144, Rev. 0 Primary Comment supply 12 V SHMOO capability, Option to disconnect any core power rail. VDDPLL has dedicated LPF POL3 — 3.3 V POL3 — 3.3 V POL3 — ...
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... PCI_C/BE[3:0] PCI_PAR PCI_FRAME PCI_TRDY PCI_IRDY PCI_STOP PCI_DEVSEL PCI_IDSEL PCI_PERR,PCI_SERR PCI_REQ0,PCI_GNT0 PCI_REQ1,PCI_GNT1 IRQ1 PCI_CLK_IN PC15(TxAddr[0]) PC13(TxAddr[1]) MSC8144ADS MSC8144, Rev. 0 Interconnection Details Primary Comment supply 12 V Most current is over PMC expansion board 12 V — — POL3 3.3 V Comment PCI-32bit mode Pull-up acts always as host MSC8144 pin mux Mode3 doesn’ ...
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... PC9(TxD[1]) PC10(TxD[2]) PD21(TxD[3]) PD6(TxD[4]) PD22(TxD[5]) PD25(TxD[6]) PD28(TxD[7]) PA25(TxD[8]) PA24(TxD[9]) PA23(TxD[10]) PA22(TxD[11]) PC21(TxD[12]) PC20(TxD[13]) PA19(TxD[14]) PA18(TxD[15]) PA29(TxSOC) PD16(TxPrty) PA31(TxEnb) PA30(TxClav) PC20(CLK12-TxCLK) PC14(RxAddr[0]) PC12(RxAddr[1]) PC6(RxAddr[2]) PD29(RxAddr[3]) PD18(RxAddr[4]) MSC8144ADS MSC8144, Rev. 0 Comment SPI_SEL UTP-16 UTP-8/16 SPI_MISO Driven from PTMC exp. card SPI_SLK Freescale Semiconductor ...
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... PA13(RxD[11]) PA14(RxD[12]) PA15(RxD[13]) PA16(RxD[14]) PA17(RxD[15]) PA27(RxSOC) PD17(RxPrty) PA28(RxEnb) PA26(RxClav) PC21(CLK11-RxCLK) PA8(A1L1RXD) PC31(CLK1-TDMA1RXCLK) PA6(A1L1RSYNC) PA9(A1L1TXD) PC30(CLK2-TDMA1TXCLK) PA7(A1L1TSYNC) PD12(B1L1RXD) PC29(CLK3-TDMB1RXCLK) PD10(B1L1RSYNC) PD13(B1L1TXD) PC28(CLK4-TDMB1TXCLK) PD11(B1L1TSYNC) PB14(C1L1RXD) PC27(CLK5-TDMC1RXCLK) MSC8144ADS MSC8144, Rev. 0 Interconnection Details Comment UTP-8/16 UTP-16 SPI_MOSI Driven from the host or PTMC exp. card 5-37 ...
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... PC26(CLK6-TDMC1TXCLK) PB13(C1L1TSYNC) PB10(D1L1RXD) PC25(CLK7-TDMD1RXCLK) PB8(D1L1RSYNC) PB11(D1L1TXD) PC24(CLK8-TDMD1TXCLK) PB9(D1L1TSYNC) PB7(A2L1TXD) PC18(CLK14-TDMA2TXCLK) PB5(A2L1TSYNC) PB6(A2L1RXD) PC19(CLK13-TDMA2RXCLK) PB4(A2L1RSYNC) PB31(B2L1TXD) PC16(CLK16-TDMB2TXCLK) PB25(B2L1TSYNC) PB30(B2L1RXD) PC21(CLK15-TDMB2RXCLK) PB29(B2L1RSYNC) PB27(C2L1TXD) PB16(CLK18 -TDMC2TXCLK) PB25(C2L1TSYNC) PB26(C2L1RXD) PB17(CLK17-TDMC2RXCLK) PB24(C2L1RSYNC) PB23(D2L1TXD) PA2(CLK20 -TDMD2TXCLK) PB21(D2L1TSYNC) PB22(D2L1RXD) PA3(CLK19 -TDMD2RXCLK) PB20(D2L1RSYNC) MSC8144ADS MSC8144, Rev. 0 Comment Freescale Semiconductor ...
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... PB20(RXD1) PB19(RXD2) PB18(RXD3) CLK14(RxCLK) PB28(RX_ER) PB30(RX_DV) — — PB27(MII_COL) PB26(MII_CRS) MSC8144ADS MSC8144, Rev. 0 Interconnection Details Comment Shared with TDM-D2(8560) Shared with TDM-C2(8560) 25MHz shared for TDM4 RXCLK Clocked from an external clock source via PTMC I/F Shared with TDM-B2(8560) Shared with TDM-D2(8560) ...
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... ADS Functional Description 5-40 MSC8144ADS MSC8144, Rev. 0 Freescale Semiconductor ...
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... The AMC edge connector, with the appropriate connecting device, allows two MSC8144ADS boards to be connected back-to-back, or alternatively, allows an MSC8144ADS to be connected to a TUNDRA device or any other ATCA system. 6.1 PTMC Expansion Card The PTMC expansion card allows expanded ethernet and video connections and serves as a verification tool for the MSC8144ADS. It has the following features: „ ...
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... PCI/TDM6 PCI/TDM6 b PCI/TDM6 — — — — PCI/TDM5 PCI/GE1-MII/UTP2-16 GND — GND — PCI/GE1-MII/UTP2-16 MSC8144ADS Reference Manual, Rev. 0 DIR to Comment ADS I,PU To IRQ3 MPC8560 Pull-Up on ADS I,PU To IRQ4 MPC8560 Pull-Up on ADS I “Card Present”, Pull-Up on the ADS, GND on PMC — +5V Power — ...
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... GND — GND — UTP_REOP UTP2-16-POS GE1MII/UTP2-16 UTP_TEOP UTP2-16-POS MSC8144ADS Reference Manual, Rev. 0 PTMC Expansion Card DIR to Comment ADS I/O Mode3 or Mode2 — +5V Power — O,PU Pull-Up on the ADS I Mode7 I Mode7 I/O Mode3/Mode1/Mode0 — ...
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... STOP/GPIO30 PCI PERR/TxDATA1 PCI/UTP2-16 GND — — — SERR/TxDATA0 PCI/UTP2-16 PCI/GE1-MII/UTP2-16 GND — PCI/TDM5 MSC8144ADS Reference Manual, Rev. 0 DIR to Comment ADS O ADS drives square pulse at PORESET to identify available CMC(PTMC) card presence — +3.3V Power O nHRST on ADS O GND on the ADS — ...
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... GE1/UTP2-16 — — GE1/UTP2-16 GE1/UTP2-16 GND — GND — GE1/UTP2-16 TDM0TSYN TDM0 MSC8144ADS Reference Manual, Rev. 0 PTMC Expansion Card DIR to Comment ADS I/O Mode3/Mode2 or Mode0 — To ADS MODCK Logic I/O Mode3/Mode2 or Mode0 I/O Mode3/Mode2 or Mode0 — +3.3V Power ...
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... GND - GND - TDM3TDAT TDM3 TDM2RCLK TDM2 TDM3RSYN TDM3 TDM2RDAT TDM2 TDM2TDAT TDM2 GND - TDM2RSYN TDM2 TDM1RCLK TDM1 TDM1TDAT TDM1 MSC8144ADS Reference Manual, Rev. 0 DIR to Comment ADS I/O e RMII Mode I g Add. SYNC1 - - PTMC ID Pull-Down I/O e RMII Mode - Special Purpose GND I/O e ...
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... TxCLAV UTP2-8/16 RxADDR2 UTP2-8/16 GND - - - RxENB UTP2-8/16 GND - TxADDR2 UTP2-8/16 GND UTP2-8/16 RxCLK UTP2-8/16 MSC8144ADS Reference Manual, Rev. 0 PTMC Expansion Card DIR to Comment ADS I/O Any Mode - O PTMC ID Pull-Down I/O Any Mode I/O Any Mode I/O Any Mode I/O Any Mode ...
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... RxDATA11 UTP2-8/16 TxDATA10 UTP2-8/16 RxDATA10 UTP2-8/16 GND - 2 SCL/GPIO26 I C TxDATA9 UTP2-8/16 RxDATA9 UTP2-8/16 TxDATA8 UTP2-8/16 RxDATA8 UTP2-8/16 GND - MSC8144ADS Reference Manual, Rev. 0 DIR to Comment ADS I/O I/O Mode3/Mode0 I/O Mode3/Mode0 I/O Mode3/Mode0 I/O Mode3/Mode0/Mode2 - - I/O Mode3/Mode0 I/O Mode3/Mode0 I/O Mode3/Mode0 I/O ...
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... MSC8144 & host Isolated Presented on non-PCI pins Utopia-8 Slave 20-lane CT-bus 20-lane CT-bus 32-lane CT-bus CPM — CPM RMII — GE2-RMII over reserved pins MSC8144ADS Reference Manual, Rev. 0 PTMC Expansion Card DIR to Comment ADS - I/O Mode3/Mode0 AMC Comment a PT5MC — — ...
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... TUNDRA device, or any other ATCA system. The AMC connecting module is shown in Figure 6-1. Fasten the connecting module (by hand) to the AMC edge connector as shown in Figure 6-2. Two MSC8144ADS boards are shown connected to each other via the AMC connecting module in Figure 6-3. ...
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... ATCA Carrier Board Signal Power Sense 1 Connect the ADS PU. To MMC on ADS sRIO ADS MMC (optional) Muxed with GE1 SGMII on MSC8144ADS Muxed with GE2 SGMII on MSC8144ADS ADS MMC (optional) Power Sense 0 Connect the ADS RTM01 - ST_8A RTM02 - ST_FA RTM03 - ST_8B RTM04 - ST_FB ...
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... Fxdata11(TDM2TDAT) Fxdata10(TDM2RCLK) Fxdata9(TDM2RSYN) Fxdata8(TDM2RDAT) Fxdata7(TDM1TDAT) Fxdata6(TDM1RCLK) Fxdata5(TDM1RSYN) Fxdata4(TDM1RDAT) Fxdata3(TDM0TDAT) Fxdata2(TDM0RCLK) Fxdata1(TDM0RSYN) Fxdata0(TDM0RDAT) MSC8144ADS Reference Manual, Rev. 0 ATCA Carrier Board Signal RTM17 - ST_D19 RTM18 - ST_D18 RTM19 - ST_D17 RTM20 - ST_D16 RTM21 - ST_D15 RTM22 - ST_D14 RTM23 - ST_D13 RTM24 - ST_D12 RTM25 - ST_D11 RTM26 - ST_D10 RTM27 - ST_D09 ...
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... Figure 7-5 to Figure 7-1 below (in that order). Note: The Allen wrench is provided in the tool kit. Figure 7-1. Disconnect Fan Figure 7-3. Remove Allen Screws Freescale Semiconductor Figure 7-2. Loosen Allen screws Figure 7-4. Remove Heat Sink MSC8144ADS Reference Manual, Rev 7-1 ...
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... Replacing the MSC8144 DSP Figure 7-5. Remove Chip Alignment Indicator Figure 7-7. Chip Alignment: Indicator on Board 7-2 Figure 7-6. Chip Alignment: Correct Figure 7-8. Chip Alignment: Indicator on Chip MSC8144ADS Reference Manual, Rev. 0 Alignment Indicators Alignment Indicator Freescale Semiconductor ...