MSC8144ADS Freescale, MSC8144ADS Datasheet - Page 43

• Manufacturer Part Number: MSC8144ADS
• Manufacturer: Freescale

Specifications of MSC8144ADS

• Lead Free Status / RoHS Status: Compliant

5.12.2
Main memory for the Host (MPC8560) is the Micron DDR1 MT8VDDT3264H(I)Y-335 256
Mbyte SODIMM.
5.12.3
The Host Local Bus allows multiplexing of addresses with data signals. The devices (configured
in asynchronous mode) located on the bus are:
5.12.3.1
The Intel StrataFlash embedded memory (P30) is used as the boot source for the MPC8560
processor. The space on the Flash memory utilized on the ADS is 16 Mbyte with a bottom boot
sector. This can be upgraded to 32/64 Mbyte parts. Access time is 85 ns
memory is via the local bus GPCM memory controller using a 16-bit port size.
When the board PORESET signal is asserted, a RST signal input is sent to the Flash memory.
This signal resets the Flash memory internal automation and inhibits write operations until the
signal is deasserted. Figure 5-13 shows the read timing for the Flash memory. Figure 5-14
shows the signal connections between the Flash memory and the MPC8560 multiplexed local
bus. The interface also supports single/page asynchronous and burst synchronous with 16-bit
accesses.
Freescale Semiconductor
„ Flash memory is Intel 16 Mbyte PC28F128P30B85
„ DS3 Framer is Exar XRT79L71
„ FPGA is Altera MAXII
LGPL3,LGPL5
Signal Name
MSRCID[1:0]
LGPL[0:1]
LWE[0:1]
LWE[2:3]
Host Memory Module
Host Local Bus
Flash on LBIU
Table 5-8. MPC8560 Reset Configuration Signals (Continued)
PCI:Two added buffer delays—required to meet
The CCB clock is the source of the RapidIO
MPC8560 acts as the host processor/agent
Debug information from the DDR SDRAM
Boot sequencer is disabled/enable
MSRCID and MDVAL signals
2-ns hold time requirement
controller is driven on the
transmit clock
Mode
MSC8144ADS MSC8144, Rev. 0
mode
Value
11/00
11/00
1/0
1/0
11
11
Reset Operation and Configuration
.
Access to the Flash
According to SW2.2
4.7k Pull-Up/Down
4.7k Pull-Up/Down
Internal Pull-Up
Internal Pull-Up
Implemented
setting
5-19