EVAL-AD73322LEB Analog Devices Inc, EVAL-AD73322LEB Datasheet - Page 5

• Manufacturer Part Number: EVAL-AD73322LEB
• Manufacturer: Analog Devices Inc

Specifications of EVAL-AD73322LEB

• Lead Free Status / RoHS Status: Supplier Unconfirmed

VREFCAP
VREFOUT
ADC
DAC
TIMING CHARACTERISTICS
Parameter
Clock Signals
Serial Port
Specifications subject to change without notice.
t
t
t
t
t
t
t
t
t
t
t
t
t
1
2
3
4
5
6
7
8
9
10
11
12
13
Limit at
T
61
24.4
24.4
t
0.4 × t
0.4 × t
20
0
10
10
10
10
30
1
A
= –40 C to +105 C
1
1
(AVDD = 3 V
otherwise noted.)
Maximum Input Range at V
Nominal Reference Level
Maximum Voltage Output Swing
Nominal Voltage Output Swing
Output Bias Voltage
Single-Ended
Differential
Single-Ended
Differential
Table II. Signal Ranges
10%; DVDD = 3 V
Unit
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns max
ns min
ns min
ns max
ns max
IN
10%; AGND = DGND = 0 V; T
Description
See Figure 1
MCLK Period
MCLK Width High
MCLK Width Low
See Figures 3 and 4
SCLK Period
SCLK Width High
SCLK Width Low
SDI/SDIFS Setup Before SCLK Low
SDI/SDIFS Hold After SCLK Low
SDOFS Delay from SCLK High
SDOFS Hold After SCLK High
SDO Hold After SCLK High
SDO Delay from SCLK High
SCLK Delay from MCLK
3 V Power Supply
5VEN = 0
1.2 V ± 10%
1.2 V ± 10%
1.578 V p-p
1.0954 V p-p
1.578 V p-p
3.156 V p-p
1.0954 V p-p
2.1909 V p-p
VREFOUT
A
= T
MlN
to T
MAX
AD73322L
, unless